LM93
16.0 Registers
16.8.25 Register E3h
Register
Address
E3h
Read/
Write
R/W
(Continued)
LM93 Configuration
Register
Name
LM93
Configuration
Bit
0
Bit 7
READY
Bit 6
Bit 5
Bit 4
P1P2_
PROCHOT
Bit 3
ALERT
_EN
Bit 2
GMSK
Bit 1
LOCK
Bit 0
START
Default
Value
00h
RES
Lock
x
Name
START
R/W
R/W
Description
When this bit is 0, the LM93 operates in basic mode.
All
error events are masked. The auto fan control
algorithm is disabled. Both PWMs are set to 0%, but
the Fan Boost function operates based on default
limits. All monitoring functions are active and the
value registers are updated.
Once this bit is set, error events are no longer
globally masked, and the auto-fan control algorithm is
enabled. Fan boost uses the programmed values
instead of the defaults.
It is expected that all limit and setup registers are set
by BIOS or application software prior to setting this
bit.
Setting this bit locks all registers and register bits that
are indicated as lockable. Lockable registers have an
“x” in the
Lock
column of their description. This
register is locked once it is set. This bit can only be
cleared by an external device asserting RESET.
Global Mask
When this bit is set by software,
all
error events are
masked. Setting this bit does not effect any other
mask registers or value registers.
When this bit is set, the ALERT output is enabled. If
this bit is cleared, the ALERT output is disabled.
In some configurations it may be required to have
both processors throttling at the same rate. When this
bit is set, the LM93 connects P1_PROCHOT to
P2_PROCHOT. If P1_PROCHOT and P2_PROCHOT
are already shorted by some other means, this bit
should NOT be set. Doing so would cause both
PROCHOT signals to be stuck low until this bit is
cleared.
Reserved
The LM93 sets this bit automatically after valid data
has been collected for all temperatures and voltages.
Software should not use any temperature or voltage
values until this bit has been set.
X
1
LOCK
R/W
2
GMSK
R/W
3
4
ALERT_EN
P1P2_
PROCHOT
R/W
R/W
6:5
7
RES
READY
R/W
R
79
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