Initial delivery state
Figure 21. Power-up timing
M25P16
V
CC
V
(max)
CC
Program, Erase and Write commands are rejected by the device
Chip selection not allowed
V
(min)
CC
tVSL
Read access allowed
Device fully
accessible
Reset state
of the
device
V
WI
tPUW
time
AI04009C
Table 8.
Symbol
Power-up timing and V threshold
WI
Parameter
Min
Max
Unit
(1)
tVSL
VCC(min) to S Low
30
1
µs
ms
V
(1)
tPUW
Time delay to Write instruction
Write Inhibit voltage
10
(1)
VWI
1.5
2.5
1. These parameters are characterized only.
8
Initial delivery state
The device is delivered with the memory array erased: all bits are set to ‘1’ (each byte
contains FFh). The Status Register contains 00h (all Status Register bits are 0).
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NUMONYX [ NUMONYX B.V ]
