NXP Semiconductors
TJA1051
High-speed CAN transceiver
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of 40 kbit/s.
6.2.2 Internal biasing of TXD and S input pins
Pin TXD has an internal pull-up to V
IO
and pin S has an internal pull-down to GND. This
ensures a safe, defined state in case one or both of these pins are left floating.
6.2.3 Undervoltage detection on pins V
CC
and V
IO
Should V
CC
or V
IO
drop below their respective undervoltage detection levels (V
uvd(VCC)
and V
uvd (VIO)
; see
the transceiver will switch off and disengage from the bus
(zero load) until V
CC
and V
IO
have recovered.
6.2.4 Over-temperature protection
The output drivers are protected against over-temperature conditions. If the virtual
junction temperature exceeds the shutdown junction temperature, T
j(sd)
, the output drivers
will be disabled until the virtual junction temperature falls below T
j(sd)
and TXD becomes
recessive again. Including the TXD condition ensures that output driver oscillations due to
temperature drift are avoided.
6.3 V
IO
supply pin
Two versions of the TJA1051 are available, only differing in the function of a single pin. Pin
5 is either not connected or is a V
IO
supply pin.
Pin V
IO
on the TJA1051T/3 and TJA1051TK/3 should be connected to the microcontroller
supply voltage (see
This will adjust the signal levels of pins TXD, RXD and S to
the I/O levels of the microcontroller. For versions of the TJA1051 without a V
IO
pin, the V
IO
input is internally connected to V
CC
. This sets the signal levels of pins TXD, RXD and S to
levels compatible with 5 V microcontrollers.
TJA1051_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 20 October 2009
5 of 18
PHILIPS [ NXP SEMICONDUCTORS ]
