MC74HC4046A
Phase-Locked Loop
High–Performance Silicon–Gate CMOS
The MC74HC4046A is similar in function to the MC14046 Metal
gate CMOS device. The device inputs are compatible with standard
CMOS outputs; with pullup resistors, they are compatible with
LSTTL outputs.
The HC4046A phase–locked loop contains three phase
comparators, a voltage–controlled oscillator (VCO) and unity gain
op–amp DEMOUT. The comparators have two common signal inputs,
COMP IN, and SIG IN. Input SIG IN and COMP IN can be used directly
coupled to large voltage signals, or indirectly coupled (with a series
capacitor to small voltage signals). The self–bias circuit adjusts small
voltage signals in the linear region of the amplifier. Phase comparator
1 (an exclusive OR gate) provides a digital error signal PC1 OUT and
maintains 90 degrees phase shift at the center frequency between
SIG IN and COMP IN signals (both at 50% duty cycle). Phase
comparator 2 (with leading–edge sensing logic) provides digital error
signals PC2 OUT and PCP OUT and maintains a 0 degree phase shift
between SIG IN and COMP IN signals (duty cycle is immaterial). The
linear VCO produces an output signal VCOOUT whose frequency is
determined by the voltage of input VCO IN signal and the capacitor
and resistors connected to pins C1A, C1B, R1 and R2. The unity gain
op–amp output DEMOUT with an external resistor is used where the
VCO IN signal is needed but no loading can be tolerated. The inhibit
input, when high, disables the VCO and all op–amps to minimize
standby power consumption.
Applications include FM and FSK modulation and demodulation,
frequency synthesis and multiplication, frequency discrimination,
tone decoding, data synchronization and conditioning,
voltage–to–frequency conversion and motor speed control.
http://onsemi.com
MARKING
DIAGRAMS
16
16
1
PDIP–16
N SUFFIX
CASE 648
MC74HC4046AN
AWLYYWW
1
16
16
1
SO–16
D SUFFIX
CASE 751B
1
HC4046A
AWLYWW
16
TSSOP–16
DT SUFFIX
CASE 948F
1
16
SOEIAJ–16
F SUFFIX
CASE 966
1
16
1
HC40
46A
ALYW
16
74HC4046B
AWLYWW
1
•
•
•
•
•
•
•
•
•
•
Output Drive Capability: 10 LSTTL Loads
Low Power Consumption Characteristic of CMOS Devices
Operating Speeds Similar to LSTTL
Wide Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0
µA
Maximum (except SIGIN and COMPIN)
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Low Quiescent Current: 80
µA
Maximum (VCO disabled)
High Noise Immunity Characteristic of CMOS Devices
Diode Protection on all Inputs
Chip Complexity: 279 FETs or 70 Equivalent Gates
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
MC74HC4046AN
MC74HC4046AD
MC74HC4046ADR2
MC74HC4046AF
Package
PDIP–16
SOIC–16
SOIC–16
SOIC–EIAJ
Shipping
2000 / Box
48 / Rail
2500 / Reel
See Note
NO TAG
MC74HC4046AFEL
SOIC–EIAJ
See Note
NO TAG
1. For ordering information on the EIAJ version of the
SOIC packages, please contact your local ON
Semiconductor representative.
©
Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 7
Publication Order Number:
MC74HC4046A/D
ONSEMI [ ON SEMICONDUCTOR ]
