CAT25128
128-Kb SPI Serial CMOS
EEPROM
Description
The CAT25128 is a 128−Kb Serial CMOS EEPROM device
internally organized as 16Kx8 bits. This features a 64−byte page write
buffer and supports the Serial Peripheral Interface (SPI) protocol. The
device is enabled through a Chip Select (CS) input. In addition, the
required bus signals are clock input (SCK), data input (SI) and data
output (SO) lines. The HOLD input may be used to pause any serial
communication with the CAT25128 device. The device features
software and hardware write protection, including partial as well as
full array protection.
Features
http://onsemi.com
SOIC−8
V SUFFIX
CASE 751BD
TDFN−8
VP2 SUFFIX
CASE 511AK
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10 MHz SPI Compatible
1.8 V to 5.5 V Supply Voltage Range
SPI Modes (0,0) & (1,1)
64−byte Page Write Buffer
Self−timed Write Cycle
Hardware and Software Protection
Block Write Protection
−
Protect 1/4, 1/2 or Entire EEPROM Array
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
8−lead PDIP, SOIC, TSSOP and 8−pad TDFN Packages
This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
V
CC
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
CS
SO
WP
V
SS
1
V
CC
HOLD
SCK
SI
PDIP (L), SOIC (V),
TSSOP (Y), TDFN (VP2)
PIN FUNCTION
Pin Name
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
CS
SO
SI
CS
WP
HOLD
SCK
V
SS
CAT25128
SO
WP
V
SS
SI
SCK
HOLD
V
CC
Figure 1. Functional Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
©
Semiconductor Components Industries, LLC, 2010
February, 2010
−
Rev. 2
1
Publication Order Number:
CAT25128/D