MC10EL51, MC100EL51
Table 1. TRUTH TABLE
D*
R
1
R
D
2
D
7
Q
8
V
CC
L
H
X
R*
L
L
H
CLK*
Z
Z
X
Q**
L
H
L
Z = LOW to HIGH Transition
* Pin will default low when left open.
**Pin will default low when inputs are left open.
CLK
3
6
Q
Table 2. PIN DESCRIPTION
PIN
R
D
CLK, CLK
Q, Q
V
CC
V
EE
EP
FUNCTION
ECL Reset Input
ECL Data Input
ECL Clock Inputs
ECL Data Outputs
Positive Supply
Negative Supply
Exposed pad must be connected
to a sufficient thermal conduit.
Electrically connect to the most
negative supply or leave floating
open.
CLK
4
5
V
EE
Figure 1. Logic Diagram and Pinout Assignment
Table 3. MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
I
I
out
T
A
T
stg
q
JA
q
JC
q
JA
q
JC
q
JA
T
sol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Pb
Pb−Free
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
8 SOIC
8 SOIC
8 SOIC
8 TSSOP
8 TSSOP
8 TSSOP
DFN8
DFN8
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
V
CC
V
I
V
EE
Condition 2
Rating
8
−8
6
−6
50
100
−40
to +85
−65
to +150
190
130
41 to 44
185
140
41 to 44
±
5%
129
84
265
265
Unit
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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