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MC100EP101MNG 参数 Datasheet PDF下载

MC100EP101MNG图片预览
型号: MC100EP101MNG
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V / 5V ECL四4输入或/或非 [3.3V / 5V ECL Quad 4−Input OR/NOR]
分类和应用: 栅极触发器逻辑集成电路
文件页数/大小: 9 页 / 155 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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MC10EP101, MC100EP101
Table 11. AC CHARACTERISTICS
V
CC
= 0 V; V
EE
=
−3.0
V to
−5.5
V or V
CC
= 3.0 V to 5.5 V; V
EE
= 0 V (Note 14)
−40°C
Symbol
f
max
t
PLH
,
t
PHL
t
SKEW
t
JITTER
t
r
t
f
Characteristic
Maximum Frequency
(See Figure 4. F
max
/JITTER)
Propagation Delay
D to Q, Q
10
100
125
180
Min
Typ
>3
Max
Min
25°C
Typ
>3
Max
Min
85°C
Typ
>3
Max
Unit
GHz
ps
225
280
15
0.2
Q, Q
100
150
325
380
50
200
<1
200
120
150
200
250
300
20
0.2
170
370
400
50
200
<1
220
150
170
250
300
320
20
0.2
190
420
450
50
200
<1
250
ps
ps
ps
Within Device Skew
Q, Q
Device to Device Skew (Note 15)
Cycle−to−Cycle Jitter
(See Figure 4. F
max
/JITTER)
Output Rise/Fall Times
(20%
80%)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50
W
to V
CC
2.0 V.
15. Skew is measured between outputs under identical transitions.
1000
900
800
V
OUTpp
(mV)
700
600
500
400
300
200
100
0
10
9
8
7
6
5
4
3
(JITTER)
2
1
4000
5000
JITTER
OUT
ps (RMS)
0
1000
2000
3000
FREQUENCY (MHz)
Figure 4. F
max
/Jitter
Q
Driver
Device
Q
Z
o
= 50
W
D
Receiver
Device
Z
o
= 50
W
50
W
50
W
D
V
TT
V
TT
= V
CC
2.0 V
Figure 5. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
Termination of ECL Logic Devices.)
http://onsemi.com
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