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MC10131 参数 Datasheet PDF下载

MC10131图片预览
型号: MC10131
PDF下载: 下载PDF文件 查看货源
内容描述: 双D型主从触发器 [Dual TYPE D Master-Slave Flip-Flop]
分类和应用: 触发器
文件页数/大小: 5 页 / 115 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual Type D Master-Slave
Flip-Flop
The MC10131 is a dual master–slave type D flip–flop. Asynchronous Set (S)
and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip–flop
may be clocked separately by holding the common clock in the low state and
using the enable inputs for the clocking function. If the common clock is to be
used to clock the flip–flop, the Clock Enable inputs must be in the low state. In
this case, the enable inputs perform the function of controlling the common
clock.
The output states of the flip–flop change on the positive transition of the
clock. A change in the information present at the data (D) input will not affect the
output information at any other time due to master slave construction.
MC10131
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
PD
FTog
tpd
tr, tf
= 235 mW typ/pkg (No Load)
= 160 MHz typ
= 3.0 ns typ
= 2.5 ns typ (20%–80%)
DIP
PIN ASSIGNMENT
LOGIC DIAGRAM
S1 5
D1 7
CE1 6
Q1
R1 4
CC 9
R2 13
Q2
CE2 11
D2 10
S2 12
Q2
14
15
3
Q1
2
VCC1
Q1
Q1
R1
S1
CE1
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
D1
VEE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC2
Q2
Q2
R2
S2
CE2
D2
CC
CLOCKED TRUTH TABLE
C
L
H
H
D
X
L
H
Qn+1
Qn
L
H
R–S TRUTH TABLE
R
L
L
H
H
S
L
H
L
H
Qn+1
Qn
H
L
N.D.
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
C = CE + CC.A clock H is a clock transition from a
low to a high state
state.
N.D. = Not Defined
3/93
©
Motorola, Inc. 1996
3–8
REV 5