MC10EP11, MC100EP11
D
V
INPP
= V
IH
(CLK) − V
IL
(CLK)
D
Q
V
OUTPP
= V
OH
(Q) − V
OL
(Q)
Q
t
PLH
t
PHL
Figure 3. AC Reference Measurement
Q
Driver
Device
Q
Z
0
= 50
W
D
Receiver
Device
Z
0
= 50
W
50
W
50
W
D
V TT
V TT = V CC − 2.0 V
Figure 4. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020 − Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1404
AN1405
AN1406
AN1504
AN1568
AN1650
AN1672
AND8001
AND8002
AND8009
AND8020
−
−
−
−
−
−
−
−
−
−
−
ECLinPS Circuit Performance at Non−Standard V
IH
Levels
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
Using Wire−OR Ties in ECLinPS Designs
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
ECLinPS Plus Spice I/O Model Kit
Termination of ECL Logic Devices
For an updated list of Application Notes, please see our website at http://onsemi.com.
http://onsemi.com
6
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