MC10H131
Table 4. ELECTRICAL CHARACTERISTICS
(V
EE
=
−5.2
V
±5%)
(Note 1)
0°
Symbol
I
E
I
inH
Characteristic
Power Supply Current
Input Current High
Pins 6, 11
Pin 9
Pins 7, 10
Pins 4, 5, 12, 13
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
Min
−
−
−
−
−
0.5
−1.02
−1.95
−1.17
−1.95
Max
62
530
660
485
790
−
−0.84
−1.63
−0.84
−1.48
Min
−
−
−
−
−
0.5
−0.98
−1.95
−1.13
−1.95
25°
Max
56
310
390
285
465
−
−0.81
−1.63
−0.81
−1.48
Min
−
−
−
−
−
0.3
−0.92
−1.95
−1.07
−1.95
75°
Max
62
310
390
285
465
−
−0.735
−1.60
−0.735
−1.45
mA
Vdc
Vdc
Vdc
Vdc
Unit
mA
mA
I
inL
V
OH
V
OL
V
IH
V
IL
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50
W
resistor to
−2.0
V.
Table 5. AC CHARACTERISTICS
0°
Symbol
t
pd
Characteristic
Propagation Delay
Clock, CE
Set, Reset
Rise Time
Fall Time
Set−up Time
Hold Time
Toggle Frequency
Min
0.8
0.6
0.6
0.6
0.7
0.8
250
Max
1.6
1.6
2.0
2.0
−
−
−
Min
0.8
0.7
0.6
0.6
0.7
0.8
250
25°
Max
1.7
1.7
2.0
2.0
−
−
−
Min
0.8
0.7
0.6
0.6
0.7
0.8
250
75°
Max
1.8
1.8
2.2
2.2
−
−
−
ns
ns
ns
ns
MHz
Unit
ns
t
r
t
f
t
set
t
hold
f
tog
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
APPLICATION INFORMATION
The MC10H131 is a dual master−slave type D flip−flop.
Asynchronous Set (S) and Reset (R) override Clock (C
C
)
and Clock Enable (CE) inputs. Each flip−flop may be
clocked separately by holding the common clock in the new
low state and using the enable inputs for the clocking
function. If the common clock is to be used to clock the
flip−flop, the Clock Enable inputs must be in the low state.
In this case, the enable inputs perform the function of
controlling the common clock.
The output states of the flip−flop change on the positive
transition of the clock. A change in the information present
at the data (D) input will not affect the output information at
any other time due to master slave construction.
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