MC10H171
Dual Binary to 1−4 Decoder
(Low)
Description
The MC10H171 is a binary coded 2 line to dual 4 line decoder with
selected outputs low. With either E0 or E1 high, the corresponding
selected 4 outputs are high. The common enable E, when high, forces
all outputs high.
Features
http://onsemi.com
MARKING DIAGRAMS*
•
Propagation Delay, 2 ns Typical
•
Power Dissipation 325 mW Typical (same as MECL 10K™)
•
Improved Noise Margin 150 mV (over operating voltage and
temperature range)
•
Voltage Compensated
•
MECL 10K Compatible
•
Pb−Free Packages are Available*
LOGIC DIAGRAM
E0 14
10 Q0 3
11 Q0 2
A9
12 Q0 1
V
CC1
= PIN 1
13 Q0 0 V
CC2
= PIN 16
V
EE
= PIN 8
3 Q1 3
4 Q1 2
5 Q1 1
6 Q1 0
20 1
PLLC−20
FN SUFFIX
CASE 775
16
1
PDIP−16
P SUFFIX
CASE 648
16
MC10H171P
AWLYYWWG
1
1 20
10H171G
AWLYYWW
B7
E 15
E1 2
DIP
PIN ASSIGNMENT
V
CC1
E1
Q13
Q12
Q11
Q10
B
V
EE
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC2
E
E0
Q00
Q01
Q02
Q03
A
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
March, 2006
−
Rev. 7
1
Publication Order Number:
MC10H171/D
ONSEMI [ ON SEMICONDUCTOR ]
