MC14513B
BCD−To−Seven Segment
Latch/Decoder/Driver
CMOS MSI
(Low−Power Complementary MOS)
The MC14513B BCD−to−seven segment latch/decoder/driver is
constructed with complementary MOS (CMOS) enhancement mode
devices and NPN bipolar output drivers in a single monolithic structure.
The circuit provides the functions of a 4−bit storage latch, an 8421
BCD−to−seven segment decoder, and has output drive capability. Lamp
test (LT), blanking (BI), and latch enable (LE) inputs are used to test the
display, to turn−off or pulse modulate the brightness of the display, and
to store a BCD code, respectively. The Ripple Blanking Input (RBI) and
Ripple Blanking Output (RBO) can be used to suppress either leading
or trailing zeroes. It can be used with seven−segment light emitting
diodes (LED), incandescent, fluorescent, gas discharge, or liquid crystal
readouts either directly or indirectly.
Applications include instrument (e.g., counter, DVM, etc.) display
driver, computer/calculator display driver, cockpit display driver, and
various clock, watch, and timer uses.
Features
http://onsemi.com
PDIP−18
P SUFFIX
CASE 707
1
MARKING DIAGRAM
18
MC14513BCP
AWLYYWWG
1
•
•
•
•
•
•
•
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Low Logic Circuit Power Dissipation
High−Current Sourcing Outputs (Up to 25 mA)
Latch Storage of Binary Input
Blanking Input
Lamp Test Provision
Readout Blanking on all Illegal Input Combinations
Lamp Intensity Modulation Capability
Time Share (Multiplexing) Capability
Adds Ripple Blanking In, Ripple Blanking Out to MC14511B
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving Two Low−Power TTL Loads, One Low−Power
Schottky TTL Load to Two HTL Loads Over the Rated Temperature
Range
•
Pb−Free Package is Available*
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Parameter
DC Supply Voltage Range
Input Voltage Range, All Inputs
DC Current Drain per Input Pin
Power Dissipation per Package (Note 1)
Operating Temperature Range
Storage Temperature Range
Maximum Continuous Output Drive
Current (Source) per Output
Maximum Continuous Output Power
(Source) per Output (Note 2)
Symbol
V
DD
V
in
I
P
D
T
A
T
stg
I
OHmax
P
OHmax
Value
−0.5 to +18.0
−0.5 to V
DD
+0.5
10
500
−55 to +125
−65 to +150
25
50
Unit
V
V
mA
mW
°C
°C
mA
mW
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
MC14513BCP
MC14513BCPG
Package
PDIP−18
PDIP−18
(Pb−Free)
Shipping
20 Units/Rail
20 Units/Rail
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
2. P
OHmax
= I
OH
(V
DD
− V
OH
)
©
Semiconductor Components Industries, LLC, 2006
This device contains protection circuitry to protect
the inputs against damage due to high static voltages
or electric fields. However, it is advised that normal
precautions be taken to avoid application of any
voltage higher than maximum rated voltages to this
high−impedance circuit. A destructive high current
mode may occur if V
in
and V
out
are not constrained to
the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Due to the sourcing capability of this circuit,
damage can occur to the device if V
DD
is applied, and
the outputs are shorted to V
SS
and are at a logical 1
(See Maximum Ratings).
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either V
SS
or V
DD
).
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
Publication Order Number:
MC14513B/D
1
June, 2006 − Rev. 6
ONSEMI [ ON SEMICONDUCTOR ]
