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MC14528BFELG 参数 Datasheet PDF下载

MC14528BFELG图片预览
型号: MC14528BFELG
PDF下载: 下载PDF文件 查看货源
内容描述: 双单稳多谐振荡器 [Dual Monostable Multivibrator]
分类和应用: 振荡器预分频器多谐振动器逻辑集成电路光电二极管时钟
文件页数/大小: 9 页 / 114 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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MC14528B
Dual Monostable
Multivibrator
The MC14528B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an output pulse over a wide range of widths, the duration
of which is determined by the external timing components,
C
X
and R
X
.
Features
http://onsemi.com
MARKING
DIAGRAMS
Separate Reset Available
Diode Protection on All Inputs
Triggerable from Leading or Trailing Edge Pulse
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
This part should only be used in new designs where the pulse width
is < 10
ms
Note: For designs requiring a pulse width > 10
ms,
please see
MC14538, which is pin−for−pin compatible
Pb−Free Packages are Available*
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Rating
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation, per Package
(Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8−Second Soldering)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Value
−0.5 to +18.0
−0.5 to V
DD
+ 0.5
±
10
500
−55 to +125
−65 to +150
260
Unit
V
V
mA
mW
°C
°C
°C
MC14528BCP
AWLYYWWG
1
PDIP−16
P SUFFIX
CASE 648
1
14528BG
AWLYWW
1
SOIC−16
D SUFFIX
CASE 751B
1
MC14528B
ALYWG
1
SOEIAJ−16
F SUFFIX
CASE 966
1
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
A
WL
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
April, 2006 − Rev. 6
Publication Order Number:
MC14528B/D