MC34001, B MC34002, B MC34004, B
Figure 13. Positive Peak Detector
8
–
VCC
D1
1N914
*
1
µF
6
5
–
1/2
MC34002
Vin
1/2
2
3
MC34002
+
+
7
VO
4
VEE
Reset
Reset
Network
or Relay
*Polycarbonate capacitor
D1 = Hi–speed, low–reverse leakage diode
Figure 14. Long Interval RC Timer
+15 V
MC34001
6
4
R6
Run
Clear
C*
–15 V
Figure 15. Isolating Large Capacitive Loads
R2 5.1 k
VCC
R1 5.1 k 2
–
MC34001 +
3
7
6
4
20 pF
CC
R3 10
RL 5.1 k
CL 0.5
µF
IO
VO
R1
VR
R4
V1
R2
R3
7
2
3
–
+
+2.0 V
0
–2.0 V
R5
*Polycarbonate or
Polystyrene Capacitor
VEE
Overshoot 10%
ts = 10
µs
When driving large CL, the VO slew rate is determined by CL
and IO(max):
t
Time (t) = R4 Cn (VR/VR–VI), R3 = R4, R5 = 0.1 R6
If R1 = R2: t = 0.693 R4C
Design Example: 100 Second Timer
VR = 10 V C = l.0
µF
R3 = R4 = 144 M
R6 = 20 k R5 = 2.0 k R1 = R2 = 1.0 k
∆V
O IO
0.02
=
=
V/µs = 0.04 V/µs (with CL shown)
0.5
∆t
CL
Figure 16. Wide BW, Low Noise,
Low Drift Amplifier
C2
R2
7
2
3
4
Sr
Power BW: fmax =
2π Vp
VCC
8
6
fmax
^
240 kHz
R1
Vin
C1
10 V
–10 V
MC34001
^
240 kHz
Parasitic input capacitance (C1
^
3.0 pF plus any additional layout capacitance)
interacts with feedback elements and creates undesirable high–frequency pole.
To compensate add C2 such that: R2C2
^
R1C1.
VEE
MOTOROLA ANALOG IC DEVICE DATA
7
ONSEMI [ ON SEMICONDUCTOR ]
