MC74AC273, MC74ACT273
Octal D Flip−Flop
The MC74AC273/74ACT273 has eight edge-triggered D−type
flip−flops with individual D inputs and Q outputs. The common
buffered Clock (CP) and Master Reset (MR) inputs load and reset
(clear) all flip−flops simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the LOW−to−HIGH clock transition, is transferred
to the corresponding flip−flop’s Q output.
All outputs will be forced LOW independently of Clock or Data
inputs by a LOW voltage level on the MR input. The device is useful
for applications where the true output only is required and the Clock
and Master Reset are common to all storage elements.
Features
http://onsemi.com
20
1
PDIP−20
SUFFIX N
CASE 738
•
•
•
•
•
•
•
•
•
•
Ideal Buffer for MOS Microprocessor or Memory
Eight Edge-Triggered D Flip−Flops
Buffered Common Clock
Buffered, Asynchronous Master Reset
See MC74AC377 for Clock Enable Version
See MC74AC373 for Transparent Latch Version
See MC74AC374 for 3-State Version
Outputs Source/Sink 24 mA
′ACT273
Has TTL Compatible Inputs
Pb−Free Packages are Available*
V
CC
20
Q
7
19
D
7
18
D
6
17
Q
6
16
Q
5
15
D
5
14
D
4
13
Q
4
12
CP
11
20
SOIC−20WB
SUFFIX DW
CASE 751D
1
TSSOP−20
SUFFIX DT
CASE 948E
1
SOEIAJ−20
SUFFIX M
CASE 967
1
20
20
PIN ASSIGNMENT
PIN
D
0
−D
7
1
MR
2
Q
0
3
D
0
4
D
1
5
6
7
D
2
8
D
3
9
Q
3
10
GND
MR
CP
Q
0
−Q
7
Q
1
Q
2
(Top View)
FUNCTION
Data Inputs
Master Reset
Clock Pulse Input
Data Outputs
Pinout: 20−Lead Packages Conductors
MODE SELECT-FUNCTION TABLE
Operating Mode
Reset (Clear)
Load
′1′
Load
′0′
Inputs
MR
L
H
H
CP
X
D
n
X
H
L
Outputs
Q
n
L
H
L
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP
MR
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 6 of this data sheet.
1
December, 2005 − Rev. 6
Publication Order Number:
MC74AC273/D
ONSEMI [ ON SEMICONDUCTOR ]
