MC74HC138A
1−of−8 Decoder/
Demultiplexer
High−Performance Silicon−Gate CMOS
The MC74HC138A is identical in pinout to the LS138. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
The HC138A decodes a three−bit Address to one−of−eight
active−low outputs. This device features three Chip Select inputs, two
active−low and one active−high to facilitate the demultiplexing,
cascading, and chip−selecting functions. The demultiplexing function
is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the
other Chip Selects are held in their active states.
Features
http://onsemi.com
MARKING
DIAGRAMS
16
16
1
PDIP−16
N SUFFIX
CASE 648
1
16
16
1
SOIC−16
D SUFFIX
CASE 751B
1
16
16
1
TSSOP−16
DT SUFFIX
CASE 948F
1
16
16
1
SOEIAJ−16
F SUFFIX
CASE 966
1
74HC138A
ALYWG
HC
138A
ALYWG
G
HC138AG
AWLYWW
MC74HC138AN
AWLYYWWG
•
•
•
•
•
•
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
m
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC
Standard No. 7A
•
Chip Complexity: 100 FETs or 29 Equivalent Gates
•
Pb−Free Packages are Available*
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G
= Pb−Free Package
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
June, 2005 − Rev. 9
Publication Order Number:
MC74HC138A/D
ONSEMI [ ON SEMICONDUCTOR ]
