欢迎访问ic37.com |
会员登录 免费注册
发布采购

MC74HC165AFG 参数 Datasheet PDF下载

MC74HC165AFG图片预览
型号: MC74HC165AFG
PDF下载: 下载PDF文件 查看货源
内容描述: 8位串行或并行输入/串行输出移位寄存器高性能硅栅CMOS [8−Bit Serial or Parallel−Input/ Serial−Output Shift Register High−Performance Silicon−Gate CMOS]
分类和应用: 移位寄存器触发器逻辑集成电路光电二极管
文件页数/大小: 12 页 / 135 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
 浏览型号MC74HC165AFG的Datasheet PDF文件第2页浏览型号MC74HC165AFG的Datasheet PDF文件第3页浏览型号MC74HC165AFG的Datasheet PDF文件第4页浏览型号MC74HC165AFG的Datasheet PDF文件第5页浏览型号MC74HC165AFG的Datasheet PDF文件第6页浏览型号MC74HC165AFG的Datasheet PDF文件第7页浏览型号MC74HC165AFG的Datasheet PDF文件第8页浏览型号MC74HC165AFG的Datasheet PDF文件第9页  
MC74HC165A
8−Bit Serial or
Parallel−Input/
Serial−Output Shift Register
High−Performance Silicon−Gate CMOS
http://onsemi.com
The MC74HC165A is identical in pinout to the LS165. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device is an 8−bit shift register with complementary outputs
from the last stage. Data may be loaded into the register either in
parallel or in serial form. When the Serial Shift/Parallel Load input is
low, the data is loaded asynchronously in parallel. When the Serial
Shift/Parallel Load input is high, the data is loaded serially on the
rising edge of either Clock or Clock Inhibit (see the Function Table).
The 2−input NOR clock may be used either by combining two
independent clock sources or by designating one of the clock inputs to
act as a clock inhibit.
Features
MARKING
DIAGRAMS
16
16
1
PDIP−16
N SUFFIX
CASE 648
1
16
16
1
SOIC−16
D SUFFIX
CASE 751B
1
16
16
1
TSSOP−16
DT SUFFIX
CASE 948F
1
16
16
1
SOEIAJ−16
F SUFFIX
CASE 966
1
74HC165A
ALYWG
HC
165A
ALYWG
G
HC165AG
AWLYWW
MC74HC165AN
AWLYYWWG
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1
mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 286 FETs or 71.5 Equivalent Gates
Pb−Free Packages are Available*
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G
= Pb−Free Package
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
June, 2005 − Rev. 5
Publication Order Number:
MC74HC165A/D