MC74LVX138
3−to−8 Line Decoder
With 5V−Tolerant Inputs
The MC74LVX138 is an advanced high speed CMOS 3−to−8 line
decoder. The inputs tolerate voltages up to 7.0 V, allowing the
interface of 5.0 V systems to 3.0 V systems.
When the device is enabled, three Binary Select inputs (A0 − A2)
determine which one of the outputs (O0 − O7) will go Low. When
enable input E3 is held Low or either E2 or E1 is held High, decoding
function is inhibited and all outputs go high. E3, E2, and E1 inputs are
provided to ease cascade connection and for use as an address decoder
for memory systems.
Features
http://onsemi.com
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
LVX138
AWLYWW
•
•
•
•
•
•
•
•
High Speed: t
PD
= 5.5 ns (Typ) at V
CC
= 3.3 V
Low Power Dissipation: I
CC
= 4
mA
(Max) at T
A
= 25
°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: V
OLP
= 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
•
Pb−Free Packages are Available*
16
TSSOP−16
DT SUFFIX
CASE 948F
1
LVX
138
ALYW
16
SOEIAJ−16
M SUFFIX
CASE 966
1
LVX138
ALYW
A
WL or L
Y
WW or W
=
=
=
=
Assembly Location
Wafer Lot
Year
Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
March, 2005 − Rev. 2
Publication Order Number:
MC74LVX138/D
ONSEMI [ ON SEMICONDUCTOR ]
