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MC74LVXT8053DTR2 参数 Datasheet PDF下载

MC74LVXT8053DTR2图片预览
型号: MC74LVXT8053DTR2
PDF下载: 下载PDF文件 查看货源
内容描述: 模拟多路复用器/多路解复用器高性能硅栅CMOS [Analog Multiplexer / Demultiplexer High−Performance Silicon−Gate CMOS]
分类和应用: 解复用器开关复用器或开关信号电路光电二极管
文件页数/大小: 12 页 / 160 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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MC74LVXT8053
Analog Multiplexer /
Demultiplexer
High−Performance Silicon−Gate CMOS
The MC74LVXT8053 utilizes silicon−gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low OFF
leakage currents. This analog multiplexer/demultiplexer controls
analog voltages that may vary across the complete power supply range
(from V
CC
to GND).
The LVXT8053 is similar in pinout to the high−speed HC4053A,
and the metal−gate MC14053B. The Channel−Select inputs determine
which one of the Analog Inputs/Outputs is to be connected by means
of an analog switch to the Common Output/Input. When the Enable
pin is HIGH, all analog switches are turned off.
The Channel−Select and Enable inputs are compatible with
TTL−type input thresholds. The input protection circuitry on this
device allows overvoltage tolerance on the input, allowing the device
to be used as a logic−level translator from 3.0 V CMOS logic to 5.0 V
CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while
operating at the higher−voltage power supply.
The MC74LVXT8053 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74LVXT8053 to be used to interface 5.0 V circuits to
3.0 V circuits.
This device has been designed so that the ON resistance (R
on
) is
more linear over input voltage than R
on
of metal−gate CMOS analog
switches.
Features
http://onsemi.com
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
1
LVXT8053
AWLYWW
16
TSSOP−16
DT SUFFIX
CASE 948F
1
LVXT
8053
ALYW
16
SOEIAJ−16
M SUFFIX
CASE 966
1
LVXT8053
ALYW
Fast Switching and Propagation Speeds
Low Crosstalk Between Switches
Diode Protection on All Inputs/Outputs
Analog Power Supply Range (V
CC
− GND) = 2.0 V to 6.0 V
Digital (Control) Power Supply Range (V
CC
− GND) = 2.0 V to 6.0 V
Improved Linearity and Lower ON Resistance Than Metal−Gate
Counterparts
Low Noise
In Compliance With the Requirements of JEDEC Standard No. 7A
Pb−Free Packages are Available*
A
WL or L
Y
WW or W
=
=
=
=
Assembly Location
Wafer Lot
Year
Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
March, 2005 − Rev. 4
Publication Order Number:
MC74LVXT8053/D