MC74VHC1G125
Noninverting 3−State Buffer
The MC74VHC1G125 is an advanced high speed CMOS
noninverting 3−state buffer fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
The internal circuit is composed of three stages, including a buffered
3−state output which provides high noise immunity and stable output.
The MC74VHC1G125 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G125 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
http://onsemi.com
MARKING
DIAGRAMS
SC−88A/SOT−353/SC−70
DF SUFFIX
CASE 419A
W0
d
•
•
•
•
•
•
•
These are Pb−Free Devices
High Speed: t
PD
= 3.5 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 58; Equivalent Gates = 15
Pin 1
d = Date Code
TSOP−5/SOT−23/SC−59
DT SUFFIX
CASE 483
Pin 1
W0
d
d = Date Code
PIN ASSIGNMENT
1
OE
1
5
V
CC
2
3
IN A
2
4
5
GND
3
4
OUT Y
A Input
OE
IN A
GND
OUT Y
V
CC
FUNCTION TABLE
OE Input
L
L
H
Y Output
L
H
Z
Figure 1. Pinout
(Top View)
L
H
X
OE
IN A
EN
ORDERING INFORMATION
OUT Y
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
©
Semiconductor Components Industries, LLC, 2004
1
September, 2004 − Rev. 12
Publication Order Number:
MC74VHC1G125/D
ONSEMI [ ON SEMICONDUCTOR ]
