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NTB25P06 参数 Datasheet PDF下载

NTB25P06图片预览
型号: NTB25P06
PDF下载: 下载PDF文件 查看货源
内容描述: 功率MOSFET -60 V, -27.5 A, P沟道D2PAK [Power MOSFET −60 V, −27.5 A, P−Channel D2PAK]
分类和应用: 晶体晶体管功率场效应晶体管开关脉冲
文件页数/大小: 6 页 / 60 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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NTB25P06
Power MOSFET
−60 V, −27.5 A, P−Channel D
2
PAK
Designed for low voltage, high speed switching applications and to
withstand high energy in the avalanche and commutation modes.
Features
Pb−Free Packages are Available
Typical Applications
V
(BR)DSS
−60 V
http://onsemi.com
R
DS(on)
TYP
65 mW @ −10 V
I
D
MAX
−27.5 A
PWM Motor Controls
Power Supplies
Converters
Bridge Circuits
P−Channel
D
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Rating
Drain−to−Source Voltage
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (t
p
v10
ms)
Drain Current
− Continuous @ T
A
= 25°C
− Single Pulse (t
p
v10
ms)
Total Power Dissipation @ T
A
= 25°C
Operating and Storage
Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting T
J
= 25°C
(V
DD
= 25 V, V
GS
= 10 V,
I
L(pk)
= 20 A, L = 3 mH, R
G
= 25
W)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, (1/8″ from case for 10 s)
Symbol
V
DSS
V
GS
V
GSM
I
D
I
DM
P
D
T
J
, T
stg
E
AS
Value
−60
"15
"20
27.5
80
120
−55 to
+175
600
Unit
V
V
Vpk
4
A
Apk
W
°C
mJ
1
2
3
D
2
PAK
CASE 418B
STYLE 2
NTB25P06
YWW
G
S
MARKING DIAGRAM
& PIN ASSIGNMENT
Drain
Drain
Gate
Source
°C/W
R
qJC
R
qJA
R
qJA
T
L
1.25
46.8
63.2
260
°C
NTB25P06 = Device Code
Y
= Year
WW
= Work Week
ORDERING INFORMATION
Device
NTB25P06
NTB25P06G
NTB25P06T4
NTB25P06T4G
Package
D
2
PAK
D
2
PAK
(Pb−Free)
D
2
PAK
D
2
PAK
(Pb−Free)
Shipping
50 Units/Rail
50 Units/Rail
800/Tape & Reel
800/Tape & Reel
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 1″ pad size
(Cu Area 1.127 in
2
).
2. When surface mounted to an FR4 board using the minimum recommended
pad size (Cu Area 0.412 in
2
).
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2004
1
August, 2004 − Rev. 2
Publication Order Number:
NTB25P06/D