Philips Semiconductors
Preliminary specification
Decoder with High-Performance Scaler
(HPS) for Image Port (PELICAN)
•
16-word
×
4 bytes FIFO register for decoded VBI output
data
Scaled 4 : 2 : 2, 4 : 1 : 1 YUV output
•
Scaled 8-bit luminance only and raw data output
•
Decoded VBI data output.
miscellaneous
•
Power-on control
•
Programming via I
2
C-bus, or parallel image data port
(full read-back ability by an external controller)
•
Chip enable function (reset for the clock generator).
APPLICATIONS
•
Desktop video
•
Multimedia
•
Digital television
•
Image processing
•
Video phone.
GENERAL DESCRIPTION
The PELICAN SAA7112 is a video capture device for
applications at the image port of VGA controllers.
The SAA7112 is a combination of a two channel analog
preprocessing circuit including source-selection,
anti-aliasing filter and ADC, an automatic clamp and gain
control, a Clock Generation Circuit (CGC), a digital
multistandard decoder and a SAA7140B based scaler,
including variable horizontal and vertical up and down
QUICK REFERENCE DATA
SYMBOL
V
DDD
V
DDA
T
amb
digital supply voltage
analog supply voltage
ambient temperature
PARAMETER
3.0
3.0
0
MIN.
MAX.
3.6
3.6
70
SAA7112
scaling and a brightness, contrast and saturation control
circuit (see Fig.1).
It is a highly integrated circuit for desktop video
applications. The decoder is based on the principle of
line-locked clock decoding and is able to decode the colour
of PAL, SECAM and NTSC signals into CCIR-601
compatible colour component values. The SAA7112
accepts as analog inputs CVBS or S-video (Y−C) from TV
or VCR sources, including weak and distorted signals.
An Expansion port for digital video (bidirectional half
duplex, D1 compatible) is also supported to connect to
MPEG or video phone CODEC. At the so called image port
the SAA7112 supports 8-bit (16-bit) wide output data with
auxiliary reference data for interfacing to VGA controllers
The target application for PELICAN is to capture and scale
video images, to be provided as digital video stream
through the image port of a VGA controller, for display via
VGAs frame buffer, or for capture to system memory.
In parallel the SAA7112 incorporates also provisions for
capturing the serially coded data in the vertical blanking
interval (VBI-data). Two principal functions are available:
to capture raw video samples and a versatile data slicer
(data recovery) unit.
The SAA7112 incorporates also a field locked audio clock
generation. This function ensures that there is always the
same number of audio samples associated with a field, or
a set of fields. This prevents the loss of synchronization
between video and audio, during capture or playback.
The circuit can be controlled via the I
2
C-bus or via its fast
parallel programming mode of the image port interface (full
write/read capability).
UNIT
V
V
°C
ORDERING INFORMATION
TYPE
NUMBER
SAA7112
PACKAGE
NAME
LQFP100
DESCRIPTION
plastic low profile quad flat package; 100 leads; body 14
×
14
×
1.4 mm
VERSION
SOT407-1
1996 Jun 20
3
PHILIPS [ NXP SEMICONDUCTORS ]
