Philips Semiconductors
Product specification
Multistandard vision and sound-IF PLL with
DVB-IF processing
SYMBOL
I
FPLL(offset)
V
o video(p-p)
V
21(sync)
V
21(clu)
V
21(cll)
R
o,21
I
int 21
I
21 max(sink)
I
21 max(source)
B
−1
B
−3
α
H
PSRR
PARAMETER
FPLL offset current at pin 7
note 8
CONDITIONS
−
MIN.
−
TYP.
TDA9819
MAX.
±4.5
UNIT
µA
Composite video amplifier (pin 21; sound carrier off)
output signal voltage
(peak-to-peak value)
sync voltage level
upper video clipping voltage level
lower video clipping voltage level
output resistance
internal DC bias current for
emitter-follower
maximum AC and DC output
sink current
maximum AC and DC output
source current
−1
dB video bandwidth
−3
dB video bandwidth
suppression of video signal
harmonics
power supply ripple rejection at
pin 21
C
L
<
50 pF; R
L
>
1 kΩ;
AC load
C
L
<
50 pF; R
L
>
1 kΩ;
AC load
C
L
<
50 pF; R
L
>
1 kΩ;
AC load; note 9
video signal; grey level; see
Fig.9
M and B/G standard
L standard
CVBS buffer amplifier (only) and noise clipper (pins 10 and 22)
R
i,22
C
i,22
V
I,22
G
v
V
10(clu)
V
10(cll)
R
o,10
I
int 10
I
o,10 max(sink)
input resistance
input capacitance
DC input voltage
voltage gain
upper video clipping voltage level
lower video clipping voltage level
output resistance
DC internal bias current for
emitter-follower
maximum AC and DC output
sink current
note 2
M, B/G and L standard;
note 10
note 2
note 2
2.6
1.4
1.5
6.5
3.9
−
−
2.0
1.4
2.4
C
L
<
20 pF; R
L
>
1 kΩ;
AC load
C
L
<
20 pF; R
L
>
1 kΩ;
AC load
10
8.4
11
3.3
2
1.8
7
4.0
1.0
−
2.5
−
−
11
14
4.0
3.0
2.1
7.5
−
1.1
10
−
−
−
−
−
kΩ
pF
V
dB
V
V
Ω
mA
mA
mA
MHz
MHz
32
26
35
30
−
−
dB
dB
note 2
see Fig.8
0.88
−
−
−
1.6
1.0
2.0
5
7
35
1.0
1.5
0.7
−
2.0
−
−
6
8
40
1.12
−
−
0.9
10
−
−
−
−
−
−
V
V
V
V
Ω
mA
mA
mA
MHz
MHz
dB
V
P
−
1.1 V
P
−
1
I
o,10 max(source)
maximum AC and DC output
source current
B
−1
B
−3
−1
dB video bandwidth
−3
dB video bandwidth
1998 Jul 14
PHILIPS [ NXP SEMICONDUCTORS ]
