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TJA1040T 参数 Datasheet PDF下载

TJA1040T图片预览
型号: TJA1040T
PDF下载: 下载PDF文件 查看货源
内容描述: 高速CAN收发器 [High speed CAN transceiver]
分类和应用: 网络接口电信集成电路电信电路光电二极管
文件页数/大小: 17 页 / 92 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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Philips Semiconductors
Product specification
High speed CAN transceiver
FUNCTIONAL DESCRIPTION
Operating modes
The TJA1040 provides two modes of operation which are
selectable via pin STB. See Table 1 for a description of the
modes of operation.
Table 1
MODE
normal
standby
Operating modes
PIN
STB
LOW
HIGH
PIN RXD
LOW
bus dominant
HIGH
bus recessive
TJA1040
to the centre tap of the split termination (see Fig.4). In case
of a recessive bus voltage <0.5V
CC
due to the presence of
an unsupplied transceiver in the network with a significant
leakage current from the bus lines to ground, the split
circuit will stabilize this recessive voltage to 0.5V
CC
. So a
start of transmission does not cause a step in the
common-mode signal which would lead to poor
ElectroMagnetic Emission (EME) behaviour.
Wake-up
In the standby mode the bus lines are monitored via a
low-power differential comparator. Once the low-power
differential comparator has detected a dominant bus level
for more than t
BUS
, pin RXD will become LOW.
Over-temperature detection
The output drivers are protected against over-temperature
conditions. If the virtual junction temperature exceeds the
shutdown junction temperature T
j(sd)
, the output drivers will
be disabled until the virtual junction temperature becomes
lower than T
j(sd)
and TXD becomes recessive again.
By including the TXD condition, the occurrence of output
driver oscillation due to temperature drifts is avoided.
TXD dominant time-out function
A ‘TXD dominant time-out’ timer circuit prevents the bus
lines from being driven to a permanent dominant state
(blocking all network communication) if pin TXD is forced
permanently LOW by a hardware and/or software
application failure. The timer is triggered by a negative
edge on pin TXD.
If the duration of the LOW level on pin TXD exceeds the
internal timer value (t
dom
), the transmitter is disabled,
driving the bus lines into a recessive state. The timer is
reset by a positive edge on pin TXD. The TXD dominant
time-out time t
dom
defines the minimum possible bit rate of
40 kBaud.
Fail-safe features
Pin TXD provides a pull-up towards V
CC
in order to force a
recessive level in case pin TXD is unsupplied.
Pin STB provides a pull-up towards V
CC
in order to force
the transceiver into standby mode in case pin STB is
unsupplied.
In the event that the V
CC
is lost, pins TXD, STB and RXD
will become floating to prevent reverse supplying
conditions via these pins.
wake-up request no wake-up
detected
request detected
N
ORMAL MODE
In this mode the transceiver is able to transmit and receive
data via the bus lines CANH and CANL. See Fig.1 for the
block diagram. The differential receiver converts the
analog data on the bus lines into digital data which is
output to pin RXD via the multiplexer (MUX). The slope of
the output signals on the bus lines is fixed and optimized
in a way that lowest ElectroMagnetic Emission (EME) is
guaranteed.
S
TANDBY MODE
In this mode the transmitter and receiver are switched off,
and the low-power differential receiver will monitor the bus
lines. A HIGH level on pin STB activates this low-power
receiver and the wake-up filter, and after t
BUS
the state of
the CAN bus is reflected on pin RXD.
The supply current on V
CC
is reduced to a minimum in
such a way that ElectroMagnetic Immunity (EMI) is
guaranteed and a wake-up event on the bus lines will be
recognized.
In this mode the bus lines are terminated to ground to
reduce the supply current (I
CC
) to a minimum. A diode is
added in series with the high-side driver of RXD to prevent
a reverse current from RXD to V
CC
in the unpowered state.
In normal mode this diode is bypassed. This diode is not
bypassed in standby mode to reduce current consumption.
Split circuit
Pin SPLIT provides a DC stabilized voltage of 0.5V
CC
. It is
turned on only in normal mode. In standby mode pin SPLIT
is floating. The V
SPLIT
circuit can be used to stabilize the
recessive common-mode voltage by connecting pin SPLIT
2003 Oct 14
4