TOP221-227
D2
MUR420
VR1
P6KE200
C2
330
µF
35 V
L1
3.3
µH
+12V
C3
220
µF
35 V
RTN
L2
22 mH
BR1
400 V
C1
47
µF
400 V
C6
0.1
µF
250 VAC
D1
BYV26C
D3
1N4148
C4
0.1
µF
R1
100
Ω
U1
D
TOP224P
CONTROL
TOPSwitch-II
C
T1
U2
PC817A
C7
1 nF
250 VAC
Y1
R2
220
Ω
J1
L
N
F1
3.15 A
S
R3
6.8
Ω
C5
47
µF
VR2
1N5241B
11 V
PI-2019-033197
Figure 8. Schematic Diagram of a 20W Universal Input TOPSwitch-II Power Supply using an 8 lead PDIP.
20W Universal Supply using 8 Lead PDIP
Figure 8 shows a 12V, 20 W secondary regulated flyback power
supply using the TOP224P in an eight lead PDIP package and
operating from universal 85 to 265 VAC input voltage. This
example demonstrates the advantage of the higher power 8 pin
leadframe used with the
TOPSwitch-II
family. This low cost
package transfers heat directly to the board through six source
pins, eliminating the heatsink and the associated cost. Efficiency
is typically 80% at low line input. Output voltage is directly
sensed by optocoupler U2 and Zener diode VR2. The output
voltage is determined by the Zener diode (VR2) voltage and the
voltage drops across the optocoupler (U2) LED and resistor R1.
Other output voltages are possible by adjusting the transformer
turns ratio and value of Zener diode VR2.
AC power is rectified and filtered by BR1 and C1 to create the
high voltage DC bus applied to the primary winding of T1. The
other side of the transformer primary is driven by the integrated
TOPSwitch-II
high-voltage MOSFET. D1 and VR1 clamp
leading-edge voltage spikes caused by transformer leakage
inductance. The power secondary winding is rectified and
filtered by D2, C2, L1, and C3 to create the 12V output voltage.
R2 and VR2 provide a slight pre-load on the 12V output to
improve load regulation at light loads. The bias winding is
rectified and filtered by D3 and C4 to create a
TOPSwitch
bias
voltage. L2 and Y1-safety capacitor C7 attenuate common
mode emission currents caused by high voltage switching
waveforms on the DRAIN side of the primary winding and the
primary to secondary capacitance. Leakage inductance of L2
with C1 and C6 attenuates differential-mode emission currents
caused by the fundamental and harmonics of the trapezoidal or
triangular primary current waveform. C5 filters internal
MOSFET gate drive charge current spikes on the CONTROL
pin, determines the auto-restart frequency, and together with
R1 and R3, compensates the control loop.
C
12/97
7
POWERINT [ POWER INTEGRATIONS, INC. ]
