October 2003
rev 1.0
ASM1817
t
R
V
CCTP
(MAX)
Application Information
Operation - Power Monitor
The
ASM1817
detects
out-of-tolerance
power
supply
conditions. It resets a processor during power-up, power-
down and issues a reset to the system processor when the
monitored power supply voltage is below the reset threshold.
V
CCTP
(MIN)
V
CCTP
~
~
When an out-of-tolerance V
CC
voltage is detected, the
RESET signal is asserted. On power-up, RESET is kept
active (HIGH) for approximatley 150ms after the power
supply voltage has reached the selected tolerance. This
allows the power supply and microprocessor to stablize
before RESET is released.
RESET
V
CC
t
RPU
ASM1817
Microprocessor
RESET
100kΩ
RESET
Figure 2: Timing Diagram: Power-Up
~
~
tF
V
CCTP
(MAX)
V
CCTP
V
OL
V
CC
Figure 1: RESET Valid to 0V V
CC
Output Conditions
V
CCTP
(MIN)
~
~
The ASM1817 active LOW reset signal is valid as long as
V
CC
remains below 1.2V. The RESET output on the
ASM1817 uses a push-pull drive stage that can maintain a
valid output below 1.2V. To sink current with V
CC
below 1.2V,
a resistor can be connected from the reset pin (RESET) to
Ground (see Figure 1). This configuration will give a valid
value on the RESET output with V
CC
approaching 0V. During
both power up and down, this configuration will draw current
when the RESET is in the high state. A value of 100kΩ
should be adequate to maintain a valid connection.
RESET
V
OH
t
RPD
RESET Slews with V
CC
Figure 3: Timing Diagram: Power-Down
~
~
Low Power, 3.3V/3.0V P Reset
Notice: The information in this document is subject to change without notice
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