February 2007
rev 1.4
Schematic for a Typical Application
Input clock 27MHz – 55MHz
VDD
FB : Optional ferrite bead
FB
0.1uF
GND
4
EMI reduced clock output
27MHz – 55MHz
ModOUT
STOP
5
ASM3P2531A
1
2
3
CLKIN
NC
8
7
6
V
DD
NC
ASM3P2531A
V
SS
NC
VDD
0
Ω
0
Ω
Use either pull-up or pull-down
resistors with 0Ω
Absolute Maximum Ratings
Symbol
V
DD
, V
IN
T
STG
T
A
T
s
T
J
T
DV
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +4.6
-65 to +125
-40 to +85
260
150
2
Unit
V
°C
°C
°C
°C
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Low Frequency EMI Reduction
Notice: The information in this document is subject to change without notice.
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