HA16114P/PJ/FP/FPJ, HA16120FP/FPJ
2.2 Error Amplifier Usage
Figure 2.3 shows an equivalent circuit of the error amplifier. The error amplifier in these ICs is a simple
NPN-transistor differential amplifier with a constant-current-driven output circuit.
The amplifier combines a wide bandwidth (f
T
= 4 MHz) with a low open-loop gain (50 dB Typ), allowing
stable feedback to be applied when the power supply is designed. Phase compensation is also easy.
IC internal V
IN
IN(−)
IN(+)
80
µA
40
µA
E/O
To internal PWM
comparator
Figure 2.3 Error Amplifier Equivalent Circuit
3. Dead-Band Duty Cycle and Soft-Start Settings
3.1 Dead-Band Duty Cycle Setting
The dead-band duty cycle (the maximum duty cycle of the PWM pulse output) can be programmed by the
voltage V
DB
at the DB pin. A convenient way to obtain V
DB
is to divide the IC’s Vref output by two external
resistors. The dead-band duty cycle (DB) and V
DB
can be calculated as follows.
V
TH
−
V
DB
×
100 (%)
⋅ ⋅ ⋅ ⋅
This applies when V
DB
> V
TL
.
V
TH
−
V
TL
If V
DB
< V
TL
, there is no PWM output.
R
2
V
DB
= Vref
×
R
1
+ R
2
DB =
Note: V
DB
is the voltage at the DB pin.
V
TH
: 1.6 V (Typ)
V
TL
: 1.0 V (Typ)
Vref is typically 2.5 V. Select R
1
and R
2
so that 1.0 V
≤
V
DB
≤
1.6 V.
Sawtooth
wave
−
DB
E/O
+
+
R
2
from
UVL
Sawtooth wave
PWM
COMP
V
TH
V
DB
V
TL
Dead band
Note: V
TH
and V
TL
vary depending on the oscillator.
Select constants by testing under implementation
conditions.
Voltage at DB pin
To Vref
R
1
V
DB
Figure 3.1 Dead-Band Duty Cycle Setting
Rev.2.0, Sep.18.2003, page 10 of 37
RENESAS [ RENESAS TECHNOLOGY CORP ]
