HD74HC590
8-bit Binary Counter/Register (with 3-state outputs)
REJ03D0632-0200
(Previous ADE-205-512)
Rev.2.00
Mar 30, 2006
Description
This device each contains an 8-bit binary counter that feeds an 8-bit storage register. The storage register has parallel
outputs. Separate clocks are provided for both the binary counter and storage register. The binary counter features a
direct clear input
CCLR
and a count enable input
CCKEN.
For cascading a ripple carry output
RCO
is provided.
Expansion is easily accomplished by tying
RCO
of the first stage to
CCKEN
of the second stage, etc.
Both the counter and register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the
counter state will always be one count ahead of the register, Internal circuitry prevents clocking from the clock enable.
Features
•
High Speed Operation: t
pd
(RCK to Q) = 18.5 ns typ (C
L
= 50 pF)
•
High Output Current: Fanout of 15 LSTTL Loads
•
Wide Operating Voltage: V
CC
= 2 to 6 V
•
Low Input Current: 1
µA
max
•
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
•
Ordering Information
Part Name
HD74HC590P
HD74HC590FPEL
Package Type
DILP-16 pin
SOP-16 pin (JEITA)
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
P
Package
Abbreviation
—
EL (2,000 pcs/reel)
Taping Abbreviation
(Quantity)
PRSP0016DH-B
FP
(FP-16DAV)
Note: Please consult the sales office for the above package availability.
Function Table
G
H
L
X
X
X
X
X
X
X
X
X
X
RCK
X
X
Inputs
CCLR
X
X
X
X
L
H
H
H
CCKEN
X
X
X
X
X
L
L
H
CCK
X
X
X
X
X
Function
Q output disabled
Q output enabled
Contents of counter stored to register
No change in register
Counter clear
Count up
No count
No count
X
RCO
= QA’•QB’•QC’•QD’•QE’•QF’•QG’•QH’• (CCKEN)
(QA’ to QH’: Output of Internal Counter)
Rev.2.00 Mar 30, 2006 page 1 of 9
RENESAS [ RENESAS TECHNOLOGY CORP ]
