HD74LS138
3-Line-to-8-Line Decoders / Demultiplexers
REJ03D0434–0300
Rev.3.00
Jul.13.2005
The HD74LS138 decodes one-of-eight line dependent on the conditions at the three binaly select inputs and the three
enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when
expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
Features
•
Ordering Information
Part Name
HD74LS138P
HD74LS138FPEL
HD74LS138RPEL
Package Type
DILP-16 pin
SOP-16 pin (JEITA)
SOP-16 pin (JEDEC)
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
Package
Abbreviation
P
FP
Taping Abbreviation
(Quantity)
-
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
PRSP0016DG-A
RP
(FP-16DNV)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
A
Select
Inputs
B
C
G
2A
Enable
Inputs
G
2B
G
1
1
A
2
3
4
5
6
7
8
B
C
G
2A
G
2B
G
1
Y
7
Y
6
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
16
15
14
13
12
11
10
9
V
CC
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Outputs
Outputs Y
7
GND
(Top view)
Rev.3.00, Jul.13.2005, page 1 of 7
RENESAS [ RENESAS TECHNOLOGY CORP ]
