HD74LS155
Dual 2-line-to-4-line Decoders / Demultiplexers
REJ03D0440–0200
Rev.2.00
Feb.18.2005
This circuit features dual 1-line-to-4-line demultiprexer with individual strobes and common binary-address input.
When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route
associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting
each of the 4-bit sections as desired. Data applied to input 1C is inverted through its outputs. The inverter following
the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-line demultiplexer without external gating.
Features
•
Ordering Information
Part Name
HD74LS155P
Package Type
DILP-16 pin
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
Package
Abbreviation
P
Taping Abbreviation
(Quantity)
—
Note: Please consult the sales office for the above package availability.
Pin Arrangement
Data 1C
Strobe 1G
Select Input B
1Y
3
1Y
2
Outputs
1Y
1
1Y
0
GND
1
2
3
4
5
6
7
8
1Y
3
1G
1C
1Y
2
1Y
1
1Y
0
B
B
A
A
2G 2Y
3
2C
B
B
A
A
2Y
2
2Y
1
2Y
0
16
15
14
13
12
11
10
9
V
CC
Data 2C
Strobe 2G
Select Input A
2Y
3
2Y
2
Outputs
2Y
1
2Y
0
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 6