HD74LS280
9-bit Odd / Even Parity Generator / Checker
REJ03D0475–0300
Rev.3.00
Jul.15.2005
This parity generator / checker offers the designer a trade-off between reduced power consumption and high
performance. Although the HD74LS280 is implemented without expander inputs, the corresponding function is
provided by the availability of an input at pin 4 and the absence of any internal connection at pin 3.
Features
•
Ordering Information
Part Name
HD74LS280P
HD74LS280FPEL
Package Type
DILP-14 pin
SOP-14 pin (JEITA)
Package Code
(Previous Code)
PRDP0014AB-B
(DP-14AV)
Package
Abbreviation
P
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
PRSP0014DF-B
FP
(FP-14DAV)
Notes: Please consult the sales office for the above package availability.
Pin Arrangement
G
Inputs
H
NC
Input I
Σ
Even
Outputs
Σ
Odd
GND
1
G
2
3
4
5
6
7
I
Σ
Even
Σ
Odd
A
H
F
E
D
C
B
14
13
12
11
10
9
8
V
CC
F
E
D
Inputs
C
B
A
(Top view)
Function Table
Number of inputs A through I that are high
0, 2, 4, 6, 8
1, 3, 5, 7, 9
Outputs
Σ
Even
H
L
Σ
Odd
L
H
Rev.3.00, Jul.15.2005, page 1 of 5
RENESAS [ RENESAS TECHNOLOGY CORP ]
