HD74LS93
Testing Table
Item
f
max
From input
to output
A
→
Q
B
→
Q
A
→
Q
A
A
→
Q
D
B
→
Q
B
B
→
Q
C
B
→
Q
D
R
0
**
→
Q
Inputs
A
IN
4.5 V
IN
IN
4.5 V
4.5 V
4.5 V
IN*
B
to Q
A
IN
to Q
A
to Q
A
IN
IN
IN
to Q
A
R
0
GND
GND
GND
GND
GND
GND
GND
IN
Q
A
Out
—
Out
—
—
—
—
Out
Q
B
Out
Out
—
—
Out
—
—
Out
Outputs
Q
C
Out
Out
—
—
—
Out
—
Out
Q
D
Out
Out
—
Out
—
—
Out
Out
t
PLH
t
PHL
* For initialized.
** Measured with each input and unused inputs at 4.5 V.
Waveform
1. f
max
, t
PLH
, t
PHL
(Clock
→
Q)
t
TLH
t
THL
3V
Clock
10%
90% 90%
1.3 V
10%
t
PHL
(Measure at t
n
+2)
Q
A
1.3 V
t
PHL
(Measure at t
n
+4)
Q
B
1.3 V
V
OL
t
PLH
(Measure at t
n
+2)
V
OH
1.3 V
t
PHL
(Measure at t
n
+8)
1.3 V
t
PLH
(Measure at t
n
+4)
V
OL
1.3 V
0V
t
PLH
(Measure at t
n
+1)
V
OH
V
OH
Q
C
1.3 V
1.3 V
V
OL
t
PHL
(Measure at t
n
+16)
t
PLH
(Measure at t
n
+8)
V
OH
Q
D
1.3 V
1.3 V
V
OL
Notes:
1. Input pulse; t
TLH
≤
15 ns, t
THL
≤
5 ns, PRR = 1 MHz, duty cycle = 50% and for fmax.,
t
TLH
= t
THL
≤
2.5 ns
2. t
n
is reference bit time when all outputs are low.
Rev.2.00, Feb.18.2005, page 6 of 8
RENESAS [ RENESAS TECHNOLOGY CORP ]
