M62362P/FP
Digital Data Format
First
MSB
Last
LSB
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10 D11 D12
DAC data
DAC select
data
DAC Data
D0
0
1
0
1
:
D1
0
0
1
1
:
D2
0
0
0
0
:
D3
0
0
0
0
:
D4
D5
D6
D7
0
0
0
0
:
D8
0
0
0
0
:
D9
D10
D/A Output
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
0
0
0
0
:
VDAref
(VIN – VDAref) / 1280 × 1 + VDAref
(VIN – VDAref) / 1280 × 2 + VDAref
(VIN – VDAref) / 1280 × 3 + VDAref
:
1
0
:
1
0
:
1
0
:
1
0
:
1
0
:
1
0
:
1
0
:
1
0
:
0
1
:
0
0
:
1
1
:
(VIN – VDAref) / 1280 × 1279 + VDAref
VIN
:
1
1
1
1
1
1
1
1
1
1
1
VIN
DAC Select Data
D11
0
D12
DAC Selection
0
1
0
1
Don't care
ch1
0
1
ch2
1
ch3
Timing Chart (Model)
MSB
LSB
D0
DI
D12
D11
D10
.............
.............
D1
CLK
BS
RESET
D/A
output
Note: Input data is carried out BS signal "L" besides CLK signal positive edge. CLK, BS, is keep generally
"H" level.
REJ03D0873-0201 Rev.2.01 Dec 27, 2007
Page 6 of 10
RENESAS [ RENESAS TECHNOLOGY CORP ]
