M64894FP/GP
Method of Setting Data
The input information to consist of 2 or data of 4 bytes to lead to chip address is received in I
2
C bus receiver. It shows a
definition of bus protocol admitted in the following.
1_STA
CA
CB
2_STA
CA
D1
3_STA
CA
CB
4_STA
CA
D1
STA : Start condition
STO : Stop condition
CA : Chip address
CB : Control data byte
BB : Band SW data byte
D1 : Divider data byte
D2 : Divider data byte
BB
D2
BB
D2
STO
STO
D1
CB
D2
BB
STO
STO
The information of 5 bytes necessary for circuit operation is chip address and control data, band SW data of 2 bytes and
divider byte of 2 bytes. After the chip address input, 2 or data of 4 bytes are received.
Function bit is contained the first and the third data byte to distinguish between divider data and control data, band data,
and “0” goes ahead of divider data, and “1” goes ahead of control data, band SW data.
SDA
SCL
S
STA
1-7
Address
CA
8
0
9
ACK
1-7
Data
8
9
ACK
1-7
Data
8
9
ACK
P
STO
Write Mode Format
Byte
Address byte
Divider byte 1
Divider byte 2
Control byte1
Band SW byte
MSB
1
0
N7
1
X
1
N14
N6
CP
X
0
N13
N5
T2
X
0
N12
N4
T1
X
0
N11
N3
T0
BS4
MA1
N10
N2
RSa
BS3
MA0
N9
N1
RSb
BS2
0
N8
N0
OS
BS1
LSB
A
A
A
A
A
Read Mode Format
Byte
Address byte
Status byte 1
MSB
1
POR
1
FL
0
X
0
X
0
X
MA1
A2
MA0
A1
1
A0
LSB
A
A
Rev.2.00 Jun 14, 2006 page 7 of 12
RENESAS [ RENESAS TECHNOLOGY CORP ]
