M64894FP/GP
T2, T1, T0: Setting Up for The Test Mode
T2
0
0
1
1
1
1
T1
0
1
1
1
0
0
T0
X
X
0
1
0
1
Charge Pump
Normal operation
High impedance
Sink
Source
High impedance
High impedance
Pin 12 Condition
ADC input
ADC input
ADC input
ADC input
f
REF
output
f1/N output
Mode
Normal operation
Test mode
Test mode
Test mode
Test mode
Test mode
RSa, RSb: Set Up for The Reference Frequency Division Ratio
RSa
1
0
X
RSb
1
1
0
Division Ratio
1/512
1/1024
1/640
OS: Set Up The Tuning Amplifier
OS
0
1
Tuning Voltage Output
ON
OFF
Mode
Normal
Test
POR : Power on reset flag. “1” output at reset
FL : Lock detector flag. “1” output at locked, “0” output at unlocked
A2, A1, A0: 5 Level A/D Converter Output Data
ADC Input Voltage
A2
0.6
±
V
CC1
to V
CC1
1
0.45
±
V
CC1
to 0.6
±
V
CC1
0
0.3
±
V
CC1
to 0.45
±
V
CC1
0
0.15
±
V
CC1
to 0.3
±
V
CC1
0
0 to 0.15
±
V
CC1
0
Note: The voltage accuracy allowance range: 0.03
±
V
CC1
(V)
A1
0
1
1
0
0
A0
0
1
0
1
0
Power On Reset Operation
(Initial state the power is turned ON)
BS4 to BS1
Charge pump
Tuning amplifier
Charge pump current
Frequency division ratio
: OFF
: High impedance
: OFF
: 270
µA
: 1/1024
Rev.2.00 Jun 14, 2006 page 9 of 12
RENESAS [ RENESAS TECHNOLOGY CORP ]
