SA8803
3.
LED Intensity Control
The LED "on" current (I
D
), is determined by the current flowing from the INTENS pin
through the external resistor. The values of I
D
can be calculated as follows:
I
D
= K
T
. V
X
R
K
T
- Current Transfer Ratio of the Internal Current Mirror (typically 10.0)
R - The programming resistor value
V
X
- The voltage drop across the external resistor (internally controlled to 5.0V)
Constant Current Mode
When the CC pin is pulled high, the device will draw a constant current from the V
DD
supply which is equal to all LED's in the "on"condition regardless of the status of the
LED's.
5.
Clock Characteristics
S
CLK
is the internal synchronous clock derived from the asynchronous external clock
applied at the CLK input pin. It divides the external clock by 8. Theoretically the
rising edge of S
CLK
(synchronous Clock) should be in the middle of every bit, as
shown in Figure 4. Because of phase shift due to the clock frequency being more
or less than 8 times the baud rate, this edge may shift its position with regard to the
bit period (B
P
). The extreme case that may still be tolerated is an edge arriving at
either the beginning, or end of bit 11. This represents the maximum shift that can
be tolerated for valid data to be received for an inaccurate input clock frequency
(F
O
).
4.
sames
5/10
SAMES [ SAMES ]
