S T U/D1030P L
S amHop Microelectronics C orp.
P reliminary May.28 2004
P -C hannel E nhancement Mode MOS FE T
P R ODUC T S UMMAR Y
V
DS S
-30V
F E AT UR E S
( m
W
) Max
I
D
-18A
R
DS (ON)
S uper high dense cell design for low R
DS (ON
).
55 @ V
G S
= -10V
85 @ V
G S
= -4.5V
R ugged and reliable.
TO-252 and TO-251 P ackage.
D
D
G
S
G
D
S
G
S DU S E R IE S
TO-252AA(D-P AK)
S DD S E R IE S
TO-251(l-P AK)
S
ABS OLUTE MAXIMUM R ATINGS (T
A
=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage
Gate-S ource Voltage
Drain C urrent-C ontinuous
a
@ T
J
=125 C
b
-P ulsed
Drain-S ource Diode Forward C urrent
a
Maximum P ower Dissipation
a
Operating Junction and S torage
Temperature R ange
S ymbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
S TG
Limit
30
20
18
45
20
50
-55 to 175
Unit
V
V
A
A
A
W
C
THE R MAL C HAR AC TE R IS TIC S
Thermal R esistance, Junction-to-C ase
Thermal R esistance, Junction-to-Ambient
1
R
JC
R
JA
3
50
C /W
C /W
SAMHOP [ SAMHOP MICROELECTRONICS CORP. ]
