E0C6008
E0C60A08 (Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Characteristic
Min.
Typ.
Max. Unit
Symbol
Condition
LCD drive voltage
-1.15 -1.05 -0.95
V
V
L1
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
V
L2
Connect 1 MΩ load resistor between V
DD
and V
L2
2·V
L1
2·V
L1
V
(without panel load)
- 0.1
×0.9
V
L3
Connect 1 MΩ load resistor between V
DD
and V
L3
3·V
L1
3·V
L1
V
(without panel load)
- 0.1
×0.9
BLD voltage
∗1
V
B0
BLC="0"
-2.35 -2.20 -2.05
V
V
B1
BLC="1"
-2.40 -2.25 -2.10
V
V
B2
BLC="2"
-2.45 -2.30 -2.15
V
V
B3
BLC="3"
-2.50 -2.35 -2.20
V
V
B4
BLC="4"
-2.55 -2.40 -2.25
V
V
B5
BLC="5"
-2.60 -2.45 -2.30
V
V
B6
BLC="6"
-2.65 -2.50 -2.35
V
V
B7
BLC="7"
-2.70 -2.55 -2.40
V
BLD circuit response time
t
B
100
µsec
Sub-BLD voltage
V
BS
-2.55 -2.40 -2.25
V
Sub-BLD circuit response time
t
BS
100
µsec
Analog comparator
V
IP
Non-inverted input (AMPP)
V
SS
+0.3
V
DD
-0.9 V
input voltage
V
IM
Inverted input (AMPM)
Analog comparator
V
OF
10
mV
offset voltage
Analog comparator
t
AMP
V
IP
=-1.5V
3
msec
response time
V
IM
=V
IP
±15mV
Current consumption
I
OP
During HALT
Without
1.1
2.0
µA
∗2
During operation
panel load
3.0
5.0
µA
During operation at 500kHz
∗2
50
70
µA
∗1:
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
∗2:
The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.
E0C60A08 (Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Characteristic
Min.
Typ.
Max. Unit
Symbol
Condition
LCD drive voltage
-1.15 -1.05 -0.95
V
V
L1
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
V
L2
Connect 1 MΩ load resistor between V
DD
and V
L2
2·V
L1
2·V
L1
V
(without panel load)
- 0.1
×0.9
V
L3
Connect 1 MΩ load resistor between V
DD
and V
L3
3·V
L1
3·V
L1
V
(without panel load)
- 0.1
×0.9
BLD voltage
∗1
V
B0
BLC="0"
-2.35 -2.20 -2.05
V
V
B1
BLC="1"
-2.40 -2.25 -2.10
V
V
B2
BLC="2"
-2.45 -2.30 -2.15
V
V
B3
BLC="3"
-2.50 -2.35 -2.20
V
V
B4
BLC="4"
-2.55 -2.40 -2.25
V
V
B5
BLC="5"
-2.60 -2.45 -2.30
V
V
B6
BLC="6"
-2.65 -2.50 -2.35
V
V
B7
BLC="7"
-2.70 -2.55 -2.40
V
BLD circuit response time
t
B
100
µsec
Sub-BLD voltage
V
BS
-2.55 -2.40 -2.25
V
Sub-BLD circuit response time
t
BS
100
µsec
Analog comparator
V
IP
Non-inverted input (AMPP)
V
SS
+0.3
V
DD
-0.9 V
input voltage
V
IM
Inverted input (AMPM)
Analog comparator
V
OF
10
mV
offset voltage
Analog comparator
t
AMP
V
IP
=-1.5V
3
msec
response time
V
IM
=V
IP
±15mV
Current consumption
I
OP
During HALT
Without
6.5
10
µA
During operation
∗2
panel load
8.5
15
µA
∗2
During operation at 500kHz
55
75
µA
∗1:
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
∗2:
The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").
The analog comparator is in the OFF status.
9
SEIKO [ SEIKO EPSON CORPORATION ]
