HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1111/1121 Series
Rev.4.1_00
Explanation of Terms
1. Low dropout voltage regulator
The low dropout voltage regulator is a voltage regulator whose dropout voltage is low due to its built-in
low on-resistance transistor.
2. Output voltage (VOUT
)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input
voltage*1, fixed output current, and fixed temperature.
*1. Differs depending the product.
Caution If the above conditions change, the output voltage value may vary and exceed the
accuracy range of the output voltage. Please see the electrical characteristics and
attached characteristics data for details.
⎛
ΔVOUT1
ΔVIN • VOUT
⎞
3. Line regulation ⎜
⎟
⎟
⎜
⎝
⎠
Indicates the dependency of the output voltage on the input voltage. That is, the value shows how much
the output voltage changes due to a change in the input voltage with the output current remaining
unchanged.
4. Load regulation (ΔVOUT2
)
Indicates the dependency of the output voltage on the output current. That is, the value shows how
much the output voltage changes due to a change in the output current with the input voltage remaining
unchanged.
5. Dropout voltage (Vdrop
)
Indicates the difference between the input voltage VIN1, which is the input voltage (VIN) at the point where
the output voltage has fallen to 98% of the output voltage value VOUT3 after VIN was gradually decreased
from VIN = VOUT(S) + 1.0 V, and the output voltage at that point (VOUT3 × 0.98).
Vdrop = VIN1 − (VOUT3 × 0.98)
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Seiko Instruments Inc.
SII [ SEIKO INSTRUMENTS INC ]
