Rev.5.0
_01
BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK
S-8254A Series
Pin Configuration
16-Pin TSSOP
Top view
COP
VMP
DOP
VINI
CDT
CCT
VSS
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD
VC1
VC2
VC3
VC4
CTL
SEL
NC
Figure 2
Table 2
Description
FET gate connection pin for charge control (Nch open drain output)
Pin for voltage detection between VC1 and VMP (Pin for overcurrent 3
2
VMP
detection)
3
DOP
FET gate connection pin for discharge control FET (CMOS output)
Pin for voltage detection between VSS and VINI (Pin for overcurrent detection
4
VINI
1,2)
Capacitor connection pin for delay for overdischarge detection, delay for
5
CDT
overcurrent detection 1
6
CCT
Capacitor connection pin for delay for overcharge current
Input pin for negative power supply,
7
VSS
Connection pin for battery 4’s negative voltage
*1
8
NC
No connection
*1
9
NC
No connection
Pin for switching 3-series or 4-series cell
10
SEL
V
SS
level: 3-series cell, V
DD
level : 4-series cell
11
CTL
Control of charge FET and discharge FET
Connection pin for battery 3’s negative voltage,
12
VC4
Connection pin for battery 4’s positive voltage
Connection pin for battery 2’s negative voltage,
13
VC3
Connection pin for battery 3’s positive voltage
Connection pin for battery 1’s negative voltage,
14
VC2
Connection pin for battery 2’s positive voltage
15
VC1
Connection pin for battery 1’s positive voltage
Input pin for positive power supply,
16
VDD
Connection pin for battery 1’s positive voltage
*1.
The NC pin is electrically open. The NC pin can be connected to VDD or VSS.
Pin No.
1
Symbol
COP
Seiko Instruments Inc.
5