C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
1.8.
Comparators and DACs
The C8051F000 MCU Family has two 12-bit DACs and two comparators on chip (the second comparator, CP1, is
not bonded out on the F002, F007, F012, and F017). The MCU data and control interface to each comparator and
DAC is via the Special Function Registers. The MCU can place any DAC or comparator in low power shutdown
mode.
The comparators have software programmable hysteresis. Each comparator can generate an interrupt on its rising
edge, falling edge, or both. The comparators’ output state can also be polled in software. These interrupts are
capable of waking up the MCU from idle mode. The comparator outputs can be programmed to appear on the Port
I/O pins via the Crossbar.
The DACs are voltage output mode and use the same voltage reference as the ADC. They are especially useful as
references for the comparators or offsets for the differential inputs of the ADC.
Figure 1.11. Comparator and DAC Diagram
(Port I/O)
(Port I/O)
CP0
CP1
CROSSBAR
CP0+
CP0-
(not bonded out on
F002, F007, F012, and
F017)
+
-
CP0
CP1+
CP1-
+
-
CP0
CP1 SFR's
(Data
and
Cntrl)
REF
CP1
CIP-51
and
Interrupt
Handler
DAC0
DAC0
REF
DAC1
DAC1
19
Rev. 1.7
SILABS [ SILICON LABORATORIES ]
