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C8051F040 参数 Datasheet PDF下载

C8051F040图片预览
型号: C8051F040
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号ISP功能的Flash MCU系列 [Mixed Signal ISP Flash MCU Family]
分类和应用: 微控制器和处理器
文件页数/大小: 328 页 / 2112 K
品牌: SILABS [ SILICON LABORATORIES ]
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C8051F040/1/2/3/4/5/6/7
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
10 or 12-Bit SAR ADC
12-bit (C8051F040/1) or
10-bit (C8051F042/3/4/5/6/7) resolution
± 1 LSB INL, guaranteed no missing codes
Programmable throughput up to 100 ksps
13 External Inputs; single-ended or differential
SW programmable high voltage difference amplifier
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor
Programmable throughput up to 500 ksps
8 External Inputs, single-ended or differential
Programmable amplifier gain: 4, 2, 1, 0.5
Can synchronize outputs to timers for jitter-free wave-
form generation
Programmable hysteresis/response time
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
Memory
-
4352 bytes internal data RAM (4 k + 256)
-
64 kB (C8051F040/1/2/3/4/5)
-
instruction set in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
20 vectored interrupt sources
-
8-bit SAR ADC (C8051F040/1/2/3 only)
or 32 kB (C8051F046/7) Flash; in-system program-
mable in 512-byte sectors
External 64 kB data memory interface (programma-
ble multiplexed or non-multiplexed modes)
-
-
Two 12-bit DACs (C8051F040/1/2/3 only)
Three Analog Comparators
Digital Peripherals
-
8 byte-wide port I/O (C8051F040/2/4/6); 5 V tolerant
-
4 byte-wide port I/O (C8051F041/3/5/7); 5 V tolerant
-
Bosch Controller Area Network (CAN 2.0B), hard-
ware SMBus™ (I
2
C™ Compatible), SPI™, and
two UART serial ports available concurrently
Programmable 16-bit counter/timer array with
6 capture/compare modules
5 general purpose 16-bit counter/timers
Dedicated watch-dog timer; bi-directional reset pin
-
Voltage Reference
-
Precision V
DD
Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
-
On-chip debug circuitry facilitates full- speed, non-
-
-
-
-
intrusive in-circuit/in-system debugging
Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
IEEE1149.1 compliant boundary scan
Complete development kit
-
-
-
Clock Sources
-
Internal calibrated programmable oscillator: 3 to
-
-
Supply Voltage: 2.7 to 3.6 V
-
Multiple power saving sleep and shutdown modes
100-Pin and 64-Pin TQFP Packages Available
-
Temperature Range: –40 to +85 °C
24.5 MHz
External oscillator: crystal, RC, C, or clock
Real-time clock mode using Timer 2, 3, 4, or PCA
ANALOG PERIPHERALS
TEMP
SENSOR
DIGITAL I/O
CROSSBAR
CAN
2.0B
UART0
UART1
SMBus
SPI Bus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
Port 0
Port 1
External Memory Interface
AMUX
PGA
VREF
12/10-bit
100 ksps
ADC
HV
DIFF
AMP
+
-
+
-
Port 2
Port 3
PGA
8-bit
500 ksps
ADC
+
AMUX
Port 4
Port 5
Port 6
Port 7
12-Bit
DAC
12-Bit
DAC
-
C8051F041/2/3
ONLY
VOLTAGE COMPARATORS
64 pin
100 pin
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25 MIPS)
20
INTERRUPTS
64 kB/32 kB
ISP FLASH
DEBUG
CIRCUITRY
4352 B
JTAG
SRAM
CLOCK
SANITY
CIRCUIT
CONTROL
Rev. 1.5 12/05
Copyright © 2005 by Silicon Laboratories
C8051F04x