C8051F020/1/2/3
8K ISP FLASH MCU Family
ANALOG PERIPHERALS
-
SAR ADC
•
12-Bit (C8051F020/1)
•
10-Bit (C8051F022/3)
•
± 1 LSB INL
•
Programmable Throughput up to 100 ksps
•
Up to 8 External Inputs; Programmable as Single-Ended or
•
•
•
•
•
•
•
Differential
Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5
Data-Dependent Windowed Interrupt Generator
Built-in Temperature Sensor (± 3°C)
Programmable Throughput up to 500 ksps
8 External Inputs
Programmable Amplifier Gain: 4, 2, 1, 0.5
Can Synchronize Outputs to Timers for Jitter-Free Wave-
form Generation
HIGH SPEED 8051
µC
CORE
-
Pipelined Instruction Architecture; Executes 70% of
-
Up to 25 MIPS Throughput with 25 MHz Clock
-
22 Vectored Interrupt Sources
MEMORY
-
4352 Bytes Internal Data RAM (4k + 256)
-
64k Bytes FLASH; In-System programmable in 512-byte
-
Sectors
External 64k Byte Data Memory Interface (programma-
ble multiplexed or non-multiplexed modes)
Instruction Set in 1 or 2 System Clocks
-
8-bit ADC
-
Two 12-bit DACs
DIGITAL PERIPHERALS
-
8 Byte-Wide Port I/O (C8051F020/2); 5V tolerant
-
4 Byte-Wide Port I/O (C8051F021/3); 5V tolerant
-
Hardware SMBus™ (I
2
C™ Compatible), SPI™, and
-
-
Two Analog Comparators
-
Voltage Reference
-
Precision VDD Monitor/Brown-Out Detector
ON-CHIP JTAG DEBUG & BOUNDARY SCAN
-
On-Chip Debug Circuitry Facilitates Full- Speed, Non-
-
-
-
-
Intrusive In-Circuit/In-System Debugging
Provides Breakpoints, Single-Stepping, Watchpoints,
Stack Monitor; Inspect/Modify Memory and Registers
Superior Performance to Emulation Systems Using ICE-
Chips, Target Pods, and Sockets
IEEE1149.1 Compliant Boundary Scan
Low-Cost,
Complete
Development Kit
-
-
CLOCK SOURCES
-
Internal Programmable Oscillator: 2-to-16 MHz
-
External Oscillator: Crystal, RC, C, or Clock
-
Real-Time Clock Mode using Timer 3 or PCA
SUPPLY VOLTAGE .......................... 2.7V TO 3.6V
-
Typical Operating Current: 10 mA @ 20 MHz
-
Multiple Power Saving Sleep and Shutdown Modes
100-Pin TQFP and 64-Pin TQFP Packages Available
Temperature Range: -40°C to +85°C
Two UART Serial Ports Available Concurrently
Programmable 16-bit Counter/Timer Array with
5 Capture/Compare Modules
5 General Purpose 16-bit Counter/Timers
Dedicated Watch-Dog Timer; Bi-directional Reset Pin
ANALOG PERIPHERALS
TEMP
SENSOR
DIGITAL I/O
UART0
UART1
SMBus
SPI Bus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Timer 4
CROSSBAR
AMUX
PGA
VREF
External Memory Interface
10/12-bit
100ksps
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
64 pin
100 pin
ADC
8-bit
500ksps
ADC
+
-
AMUX
+
-
PGA
12-Bit
DAC
12-Bit
DAC
VOLTAGE
COMPARATORS
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25MIPS)
22
INTERRUPTS
64KB
ISP FLASH
DEBUG
CIRCUITRY
4352 B
JTAG
SRAM
CLOCK
SANITY
CIRCUIT
CONTROL
Preliminary Rev. 1.4 12/03
Copyright © 2003 by Silicon Laboratories
C8051F020/1/2/3-DS14
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
SILABS [ SILICON LABORATORIES ]
