STK10C48
2K x 8 nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
Obsolete - Not Recommend for new Designs
FEATURES
DESCRIPTION
• 25ns, 35ns and 45ns Access Times
• STORE to Nonvolatile Elements Initiated by
Hardware
• RECALL to SRAM Initiated by Hardware or
Power Restore
• Automatic STORE Timing
• 10mA Typical ICC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to Nonvolatile Ele-
ments
• 100-Year Data Retention over Full Industrial
Temperature Range
• Commercial and Industrial Temperatures
The Simtek STK10C48 is a fast static RAM with a non-
volatile element incorporated in each static memory
cell. The SRAM can be read and written an unlimited
number of times, while independent nonvolatile data
resides in the Nonvolatile Elements. Data may easily
be transferred from the SRAM to the Nonvolatile Ele-
ments (the STORE operation), or from the Nonvolatile
Elements to the SRAM (the RECALL operation), using
the NE pin. Transfers from the Nonvolatile Elements to
the SRAM (the RECALL operation) also take place auto-
matically on restoration of power. The STK10C48
combines the high performance and ease of use of a
fast SRAM with nonvolatile data integrity.
• 28-Pin 300 mil PDIP, 300 mil SOIC and
350 mil SOIC Packages
The STK10C48 features industry-standard pinout for
nonvolatile RAMs.
PIN CONFIGURATIONS
BLOCK DIAGRAM
1
NE
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
W
NC
2
Quantum Trap
32 x 512
NC
3
A
A
A
A
A
7
4
A
6
5
4
3
2
8
A
9
NC
G
5
6
STORE
A
A
A
A
A
5
6
7
8
9
7
8
A
A
E
10
9
A
A
STATIC RAM
ARRAY
1
RECALL
10
11
12
13
14
DQ
DQ
DQ
0
7
6
DQ
0
32 x 512
DQ
1
2
5
28 - 300 PDIP
28 - 300 SOIC
28 - 350 SOIC
DQ
DQ
DQ
4
3
V
SS
PIN NAMES
DQ0
DQ1
DQ2
DQ3
DQ4
COLUMN I/O
STORE/
RECALL
CONTROL
A
- A
10
Address Inputs
Write Enable
Data In/Out
0
COLUMN DEC
W
DQ - DQ
0
7
E
Chip Enable
Output Enable
Nonvolatile Enable
Power (+ 5V)
Ground
DQ5
DQ6
DQ7
A3 A
4 A10
A0 A1 A2
G
NE
G
NE
E
V
V
CC
W
SS
March 2006
1
Document Control # ML0002 rev 0.2
SIMTEK [ SIMTEK CORPORATION ]
