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STK11C48-N35I 参数 Datasheet PDF下载

STK11C48-N35I图片预览
型号: STK11C48-N35I
PDF下载: 下载PDF文件 查看货源
内容描述: 2K ×8的nvSRAM QuantumTrap⑩ CMOS非易失性静态RAM [2K x 8 nvSRAM QuantumTrap⑩ CMOS Nonvolatile Static RAM]
分类和应用: 存储内存集成电路静态存储器光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 10 页 / 370 K
品牌: SIMTEK [ SIMTEK CORPORATION ]
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STK11C48  
2K x 8 nvSRAM  
QuantumTrap™ CMOS  
Nonvolatile Static RAM  
Obsolete - Not Recommend for new Designs  
FEATURES  
DESCRIPTION  
• 25ns, 35ns and 45ns Access Times  
The Simtek STK11C48 is a fast static RAM with a  
nonvolatile element incorporated in each static  
memory cell. The SRAM can be read and written an  
unlimited number of times, while independent, non-  
volatile data resides in the Nonvolatile Elements.  
Data transfers from the SRAM to the Nonvolatile Ele-  
ments (the STORE operation), or from Nonvolatile  
Elements to SRAM (the RECALL operation), take  
place using a software sequence. Transfers from the  
Nonvolatile Elements to the SRAM (the RECALL  
operation) also take place automatically on restora-  
tion of power.  
STORE to Nonvolatile Elements Initiated by  
Software  
RECALL to SRAM Initiated by Software or  
Power Restore  
• 10mA Typical ICC at 200ns Cycle Time  
• Unlimited READ, WRITE and RECALL Cycles  
• 1,000,000 STORE Cycles to Nonvolatile Ele-  
ments  
• 100-Year Data Retention in Nonvolatile Ele-  
ments  
• Commercial and Industrial Temperatures  
• 28-Pin 300 mil PDIP, 300 mil SOIC and  
350 mil SOIC Packages  
BLOCK DIAGRAM  
PIN CONFIGURATIONS  
1
NC  
NC  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
CC  
W
NC  
Quantum Trap  
32 x 512  
2
3
A
A
7
4
A
6
5
4
3
8
A5  
5
A
A
A
A
A
9
NC  
G
STORE  
STORE/  
RECALL  
CONTROL  
6
A6  
A7  
A8  
A9  
7
STATIC RAM  
ARRAY  
8
RECALL  
A
2
10  
9
A
E
1
0
32 x 512  
10  
11  
12  
13  
14  
A
DQ  
DQ  
7
6
5
DQ  
0
28 - 300 PDIP  
28 - 300 SOIC  
28 - 350 SOIC  
DQ  
DQ  
1
2
DQ  
DQ  
DQ  
4
3
SOFTWARE  
DETECT  
A0 - A10  
V
SS  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
COLUMN I/O  
PIN NAMES  
COLUMN DEC  
A
- A  
Address Inputs  
Write Enable  
Data In/Out  
Chip Enable  
Output Enable  
Power (+ 5V)  
Ground  
0
10  
W
A0 A1 A2 A3 A4 A10  
DQ - DQ  
0
G
7
E
E
G
W
V
V
CC  
SS  
March 2006  
1
Document Control # ML0003 rev 0.2