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STK14C88-3RF55 参数 Datasheet PDF下载

STK14C88-3RF55图片预览
型号: STK14C88-3RF55
PDF下载: 下载PDF文件 查看货源
内容描述: [Non-Volatile SRAM, 32KX8, 55ns, CMOS, PDSO48, 0.300 INCH, PLASTIC, SSOP-48]
分类和应用: 静态存储器光电二极管内存集成电路
文件页数/大小: 13 页 / 242 K
品牌: SIMTEK [ SIMTEK CORPORATION ]
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STK14C88-3  
32K x 8 AutoStore™ nvSRAM  
QuantumTrap™ CMOS  
Nonvolatile Static RAM  
FEATURES  
DESCRIPTION  
The Simtek STK14C88-3 is a fast static RAM with a  
• 35ns, 45ns and 55ns Access Times  
• “Hands-off” Automatic STORE with External  
nonvolatile element incorporated in each static  
memory cell. The SRAM can be read and written an  
unlimited number of times, while independent, non-  
volatile data resides in nonvolatile elements. Data  
transfers from the SRAM to the nonvolatile elements  
(the STORE operation) can take place automatically  
on power down. A 68µF or larger capacitor tied from  
VCAP to ground guarantees the STORE operation,  
regardless of power-down slew rate or loss of power  
from “hot swapping”. Transfers from the nonvolatile  
elements to the SRAM (the RECALL operation) take  
place automatically on restoration of power. Initia-  
tion of STORE and RECALL cycles can also be soft-  
ware controlled by entering specific read  
sequences. A hardware STORE may be initiated with  
the HSB pin.  
68µF Capacitor on Power Down  
STORE to nonvolatile elements Initiated by  
Hardware, Software or AutoStore™  
RECALL to SRAM Initiated by Software or  
Power Restore  
• 10mA Typical ICC at 200ns Cycle Time  
• Unlimited READ, WRITE and RECALL Cycles  
• 1,000,000 STORE Cycles to nonvolatile ele-  
ments (Commercial/Industrial)  
• 100-Year Data Retention in nonvolatile ele-  
ments (Commercial/Industrial)  
• Single 3.3V + 0.3V Operation  
• Commercial and Industrial Temperatures  
• 32-Pin SOIC and DIP Packages  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
V
V
CAP  
CCX  
Quantum Trap  
512 x 512  
POWER  
VCCX  
HSB  
W
A13  
A8  
A9  
A11  
G
NC  
A10  
E
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
VCAP  
A14  
A12  
A7  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
CONTROL  
A5  
A6  
STORE  
A7  
STORE/  
RECALL  
A8  
STATIC RAM  
HSB  
RECALL  
A9  
ARRAY  
CONTROL  
A11  
A12  
A13  
A14  
512 x 512  
A6  
A5  
A4  
SOFTWARE  
DETECT  
A
- A  
13  
0
DQ  
0
A3  
COLUMN I/O  
DQ  
1
NC  
A2  
9
COLUMN DEC  
DQ  
2
DQ  
3
10  
11  
12  
13  
14  
15  
16  
DQ  
4
A1  
DQ  
5
A
A A A A A  
1 2 3 4 10  
0
DQ  
G
6
DQ  
A0  
7
DQ0  
DQ1  
DQ2  
VSS  
E
W
32 - DIP  
32 - SOIC  
48 - SSOP  
(not to scale)  
PIN NAMES  
A
- A  
DQ -DQ  
E
W
G
HSB  
V
V
V
0
14  
0
7
CCX  
CAP  
SS  
Address  
Inputs  
Data In/Out  
Chip  
Enable  
Write  
Enable  
Output  
Enable  
Hardware  
Store  
Busy (I/O)  
Power  
(+ 3.3V)  
Capacitor  
Ground  
November 2003  
1
Document Control # ML0015 rev 0.3