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CY28347ZC 参数 Datasheet PDF下载

CY28347ZC图片预览
型号: CY28347ZC
PDF下载: 下载PDF文件 查看货源
内容描述: 通用单芯片时钟解决方案VIA P4M266 / KM266 DDR系统 [Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems]
分类和应用: 晶体外围集成电路光电二极管双倍数据速率时钟
文件页数/大小: 21 页 / 231 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28347  
AC Parameters (continued)  
66 MHz  
100 MHz  
133 MHz  
200 MHz  
Min. Max. Unit  
Parameter  
TPeriod  
Tr / Tf  
Description  
Min.  
Max.  
15.5  
1.6  
Min.  
Max.  
10.5  
1.6  
Min.  
Max.  
7.65  
1.6  
Notes  
ns 5,10,6  
CPUCS_T/C Period  
15  
10.0  
0.4  
7.35  
0.4  
4.85  
0.4  
5.1  
1.6  
CPUCS_T/C Rise and  
Fall Times  
0.4  
ns 5,10,21  
VD  
VX  
Differential Voltage AC  
0.4  
Vp+  
0.6V  
0.4  
Vp+  
0.6V  
0.4  
Vp+  
0.6V  
0.4  
Vp+  
0.6V  
V 24  
Differential Crossover  
Voltage  
0.5*VD 0.5*VD 0.5*VD 0.5*VD 0.5*VD 0.5*VD 0.5*VD 0.5*VD V 14  
DI–0.2 DI+0.2 DI–0.2 DI+0.2 DI–0.2 DI+0.2 DI–0.2 DI+0.2  
AGP  
TDC  
AGP(0:2) Duty Cycle  
AGP(0:2) Period  
45  
15  
55  
16  
45  
15  
55  
16  
45  
15  
55  
16  
45  
15  
55  
16  
% 5,6,10  
ns 5,6,10  
ns 10,25  
ns 10,18  
ns 10,21  
TPeriod  
THIGH  
TLOW  
Tr/Tf  
AGP(0:2) HIGH Time  
AGP(0:2) LOW Time  
5.25  
5.05  
0.4  
5.25  
5.05  
0.4  
5.25  
5.05  
0.4  
5.25  
5.05  
0.4  
AGP(0:2) Rise and Fall  
Times  
1.6  
250  
500  
1.6  
250  
500  
1.6  
250  
500  
1.6  
250  
500  
TSKEW  
TCCJ  
Any AGP to Any AGP  
Clock Skew  
ps 10,11,12  
AGP(0:2) Cycle-to-Cycle  
Jitter  
ps 6,10,11,12  
PCI  
TDC  
PCI(_F,1:6) Duty Cycle  
PCI(_F,1:6) Period  
45  
55  
45  
55  
45  
55  
45  
55  
% 5,6,10  
ns 5,6,10  
ns 10,25  
ns 10,18  
ns 10,21  
TPeriod  
THIGH  
TLOW  
Tr/Tf  
30.0  
12.0  
12.0  
0.5  
30.0  
12.0  
12.0  
0.5  
30.0  
12.0  
12.0  
0.5  
30.0  
12.0  
12.0  
0.5  
PCI(_F,1:6) HIGH Time  
PCI(_F,1:6) LOW Time  
PCI(_F,1:6) Rise and Fall  
Times  
2.0  
500  
500  
2.0  
500  
500  
2.0  
500  
500  
2.0  
500  
500  
TSKEW  
TCCJ  
Any PCI to Any PCI Clock  
Skew  
ps 10,11,12  
PCI(_F,1:6)  
Cycle-to-Cycle Jitter  
ps 10,6,11,12  
48 MHz  
TDC  
48-MHz Duty Cycle  
48-MHz Period  
45  
55  
45  
55  
45  
55  
45  
55  
% 5,6,10  
TPeriod  
Tr/Tf  
20.8299 20.8333 20.8299 20.8333 20.8299 20.8333 20.8299 20.8333 ns 5,6,10  
48-MHz Rise and Fall  
Times  
1.0  
4.0  
1.0  
4.0  
1.0  
4.0  
1.0  
4.0  
ns 10,21  
TCCJ  
48-MHz Cycle-to-Cycle  
Jitter  
500  
500  
500  
500  
ps 10,6,11,12  
24 MHz  
TDC  
24-MHz Duty Cycle  
24-MHz Period  
45  
55  
45  
55  
45  
55  
45  
55  
% 5,6,10  
TPeriod  
Tr / Tf  
41.660 41.667 41.660 41.667 41.660 41.667 41.660 41.667 ns 5,6,10  
24-MHz Rise and Fall  
Times  
1.0  
4.0  
1.0  
4.0  
1.0  
4.0  
1.0  
4.0  
ns 10,21  
TCCJ  
24-MHz Cycle-to-Cycle  
Jitter  
500  
500  
500  
500  
ps 6,10,11,12  
Notes:  
24. Measured at VX between the falling edge and the following rising edge of the signal.  
25. Probes are placed on the pins, and measurements are acquired at 0.4V.  
Rev 1.0,November 20, 2006  
Page 11 of 21