CY28349B
Data Byte 9
Bit
Bit 7
Pin#
–
Name
48MHz_DRV
Pin Description
48MHz and 24_48MHz clock output drive strength
0 = Normal
1 = High Drive
(Recommend to set to high drive if this output is being used
to drive both USB and SIO devices in Intel Brookdale - G
platforms)
PCI clock output drive strength
0 = Normal
1 = High Drive
3V66 clock output drive strength
0 = Normal
1 = High Drive
This bit will enable the generation of a Reset pulse when a
Watchdog timer time-out occurs.
0 = Disabled
1 = Enabled
This bit will enable the generation of a Reset pulse after a
frequency change occurs.
0 = Disabled
1 = Enabled
Watchdog Timer Time-out Status bit
0 = No time-out occurs (Read); Ignore (Write)
1 = time-out occurred (Read); Clear WD_TO_STATUS
(Write)
0 = Stop and reload Watchdog Timer
1 = Enable Watchdog Timer. It will start counting down after
a frequency change occurs.
Note:
CY28349B will generate system reset, reload a
recovery frequency, and lock itself into a recovery
frequency mode after a Watchdog Timer time-out occurs.
Under recovery frequency mode, CY28349B will not
respond to any attempt to change output frequency via the
SMBus control bytes. System software can unlock
CY28349B from its recovery frequency mode by clearing
the WD_EN bit.
Reserved
Power On
Default
0
Bit 6
–
PCI_DRV
0
Bit 5
–
3V66_DRV
0
Bit 4
–
RST_EN_WD
0
Bit 3
–
RST_EN_FC
0
Bit 2
–
WD_TO_STATUS
0
Bit 1
–
WD_EN
0
Bit 0
Data Byte 10
Bit
Bit 7
Bit 6
Bit 5
–
Reserved
0
Pin#
–
–
–
Name
CPU_Skew2
CPU_Skew1
CPU_Skew0
CPU skew control
000 = Normal
001 = –150 ps
010 = –300 ps
011 = –450 ps
100 = +150 ps
101 = +300 ps
110 = +450 ps
111 = +600 ps
Pin Description
Power On
Default
0
0
0
Bit 4
–
Fixed 3V66/PCI
Fixed 3V66 and PCI output mode
0 = Disabled
1 = Enabled
When enabled, 3V66 and PCI output frequency will be fixed
at 64 MHz and 32 MHz respectively.
0
Rev 1.0, November 20, 2006
Page 9 of 20
SPECTRALINEAR [ SPECTRALINEAR INC ]
