CY28405
Byte 14: Control Register 14
Bit
@Pup
Name
Description
7
0
FS_(E:A)
FS_Override
0 = Select operating frequency by FS(E:A) input pins
1 = Select operating frequency by FSEL(4:0) settings
6
5
4
3
2
1
0
1
0
0
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved, Set = 1
Reserved, Set = 0
Reserved, Set = 0
Reserved, Set = 0
Reserved, Set = 0
Reserved, Set = 0
Pro_Freq_EN
Programmable output frequencies enabled
0 = Disabled, 1 = Enabled
Dial-a-Frequency Programming
Crystal Recommendations
When the programmable output frequency feature is enabled
(Pro_Freq_EN bit is set), the CPU output frequency is deter-
mined by the following equation:
The CY28405 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28405 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Fcpu = G * N/M
“N” and “M” are the values programmed in Programmable
Frequency Select N-Value Register and M-Value Register,
respectively.
Crystal Loading
“G” stands for the PLL Gear Constant, which is determined by
the programmed value of FS[E:A] or SEL[4:0]. The value is
listed in Table 1.
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
The ratio of N and M need to be greater than “1” [N/M> 1].
The following table lists set of N and M values for different
frequency output ranges. This example use a fixed value for
the M-Value Register and select the CPU output frequency by
changing the value of the N-Value Register.
Figure 1 shows a typical crystal configuration using the two
trim capacitors. An important clarification for the following
discussion is that the trim capacitors are in series with the
crystal not parallel. It’s a common misconception that load
capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is not true.
Table 5. Examples of N and M Value for Different CPU
Frequency Range
Range of N-Value
Fixed Value
for M-Value
Register
Register for
Different CPU
Frequency
Frequency
Ranges
Gear
Constants
100 –125 24004009.32
126 – 166 32005345.76
167 – 200 48008018.65
48
48
48
200 – 250
189 – 249
167 – 200
Table 6. Crystal Recommendations
Frequency
(Fund)
Drive
(max.)
Shunt Cap Motional
(max.)
Tolerance
(max.)
Stability
(max.)
Aging
(max.)
Cut
Loading Load Cap
(max.)
14.31818 MHz
AT
Parallel 20 pF
0.1 mW
5 pF
0.016 pF
50 ppm
50 ppm
5 ppm
Rev 1.0,November 20, 2006
Page 10 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
